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GPU TPC Clusterizer: Make CPU code compatible to processing scheme as on device
1 parent f6943ef commit 108a1ba

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Lines changed: 14 additions & 8 deletions

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‎GPU/GPUTracking/TPCClusterFinder/GPUTPCCFDecodeZS.cxx‎

Lines changed: 14 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -48,7 +48,8 @@ GPUdii() void GPUTPCCFDecodeZS::decode(GPUTPCClusterFinder& clusterer, GPUShared
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#ifdef GPUCA_GPUCODE
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const uint32_t endpoint = clusterer.mPzsOffsets[iBlock].endpoint;
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#else
51-
const uint32_t endpoint = iBlock;
51+
const bool deviceLayout = clusterer.IsDeviceProcessor(); // Host-compiled kernel running with threading as on a device
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const uint32_t endpoint = deviceLayout ? clusterer.mPzsOffsets[iBlock].endpoint : iBlock;
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#endif
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const GPUTrackingInOutZS::GPUTrackingInOutZSSector& zs = clusterer.GetConstantMem()->ioPtrs.tpcZS->sector[sector];
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if (zs.count[endpoint] == 0) {
@@ -74,9 +75,11 @@ GPUdii() void GPUTPCCFDecodeZS::decode(GPUTPCClusterFinder& clusterer, GPUShared
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{
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{
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#else
77-
for (uint32_t i = clusterer.mMinMaxCN[endpoint].zsPtrFirst; i < clusterer.mMinMaxCN[endpoint].zsPtrLast; i++) {
78-
const uint32_t minJ = (i == clusterer.mMinMaxCN[endpoint].zsPtrFirst) ? clusterer.mMinMaxCN[endpoint].zsPageFirst : 0;
79-
const uint32_t maxJ = (i + 1 == clusterer.mMinMaxCN[endpoint].zsPtrLast) ? clusterer.mMinMaxCN[endpoint].zsPageLast : zs.nZSPtr[endpoint][i];
78+
const uint32_t iFirst = deviceLayout ? 0 : clusterer.mMinMaxCN[endpoint].zsPtrFirst;
79+
const uint32_t iLast = deviceLayout ? 1 : clusterer.mMinMaxCN[endpoint].zsPtrLast;
80+
for (uint32_t i = iFirst; i < iLast; i++) {
81+
const uint32_t minJ = deviceLayout ? clusterer.mPzsOffsets[iBlock].num : ((i == iFirst) ? clusterer.mMinMaxCN[endpoint].zsPageFirst : 0);
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const uint32_t maxJ = deviceLayout ? (minJ + 1) : ((i + 1 == iLast) ? clusterer.mMinMaxCN[endpoint].zsPageLast : zs.nZSPtr[endpoint][i]);
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for (uint32_t j = minJ; j < maxJ; j++) {
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#endif
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const uint32_t* pageSrc = (const uint32_t*)(((const uint8_t*)zs.zsPtr[endpoint][i]) + j * TPCZSHDR::TPC_ZS_PAGE_SIZE);
@@ -370,7 +373,8 @@ GPUd() void GPUTPCCFDecodeZSLinkBase::Decode(int32_t nBlocks, int32_t nThreads,
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#ifdef GPUCA_GPUCODE
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const uint32_t endpoint = clusterer.mPzsOffsets[iBlock].endpoint;
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#else // CPU
373-
const uint32_t endpoint = iBlock;
376+
const bool deviceLayout = clusterer.IsDeviceProcessor(); // Host-compiled kernel running as device kernel (CPUDevice backend): GPU work distribution, one block per page
377+
const uint32_t endpoint = deviceLayout ? clusterer.mPzsOffsets[iBlock].endpoint : iBlock;
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#endif
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376380
const GPUTrackingInOutZS::GPUTrackingInOutZSSector& zs = clusterer.GetConstantMem()->ioPtrs.tpcZS->sector[sector];
@@ -386,9 +390,11 @@ GPUd() void GPUTPCCFDecodeZSLinkBase::Decode(int32_t nBlocks, int32_t nThreads,
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{
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{
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#else // CPU
389-
for (uint32_t i = clusterer.mMinMaxCN[endpoint].zsPtrFirst; i < clusterer.mMinMaxCN[endpoint].zsPtrLast; i++) {
390-
const uint32_t minJ = (i == clusterer.mMinMaxCN[endpoint].zsPtrFirst) ? clusterer.mMinMaxCN[endpoint].zsPageFirst : 0;
391-
const uint32_t maxJ = (i + 1 == clusterer.mMinMaxCN[endpoint].zsPtrLast) ? clusterer.mMinMaxCN[endpoint].zsPageLast : zs.nZSPtr[endpoint][i];
393+
const uint32_t iFirst = deviceLayout ? 0 : clusterer.mMinMaxCN[endpoint].zsPtrFirst;
394+
const uint32_t iLast = deviceLayout ? 1 : clusterer.mMinMaxCN[endpoint].zsPtrLast;
395+
for (uint32_t i = iFirst; i < iLast; i++) {
396+
const uint32_t minJ = deviceLayout ? clusterer.mPzsOffsets[iBlock].num : ((i == iFirst) ? clusterer.mMinMaxCN[endpoint].zsPageFirst : 0);
397+
const uint32_t maxJ = deviceLayout ? (minJ + 1) : ((i + 1 == iLast) ? clusterer.mMinMaxCN[endpoint].zsPageLast : zs.nZSPtr[endpoint][i]);
392398
for (uint32_t j = minJ; j < maxJ; j++) {
393399
#endif
394400
const uint32_t* pageSrc = (const uint32_t*)(((const uint8_t*)zs.zsPtr[endpoint][i]) + j * TPCZSHDR::TPC_ZS_PAGE_SIZE);

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