diff --git a/build.zig b/build.zig
index bdedc5359..cff56454c 100644
--- a/build.zig
+++ b/build.zig
@@ -69,6 +69,7 @@ pub fn build(b: *Build) void {
         builder.addRule(.{ .builtin = .no_hidden_allocations }, .{});
         builder.addRule(.{ .builtin = .no_deprecated }, .{});
         builder.addRule(.{ .builtin = .no_literal_only_bool_expression }, .{});
+        builder.addRule(.{ .builtin = .no_redundant_comptime }, .{});
         builder.addRule(.{ .builtin = .require_fmt }, .{});
         builder.addRule(.{ .builtin = .switch_case_ordering }, .{});
 
diff --git a/core/src/core/mem.zig b/core/src/core/mem.zig
index 046530ad0..db3d39753 100644
--- a/core/src/core/mem.zig
+++ b/core/src/core/mem.zig
@@ -1,6 +1,6 @@
 const std = @import("std");
 
-pub fn EndianInt(comptime T: type, e: std.lang.Endian) type {
+pub fn EndianInt(T: type, e: std.lang.Endian) type {
     return packed struct(T) {
         raw: T,
 
diff --git a/core/src/cpus/cortex_m.zig b/core/src/cpus/cortex_m.zig
index 8bf8b62c5..76032bdf4 100644
--- a/core/src/cpus/cortex_m.zig
+++ b/core/src/cpus/cortex_m.zig
@@ -549,7 +549,7 @@ pub const atomic = struct {
     };
 
     /// Atomic add
-    pub fn add(comptime T: type, ptr: *T, delta: T) T {
+    pub fn add(T: type, ptr: *T, delta: T) T {
         if (has_native_atomics) {
             return @atomicRmw(T, ptr, .Add, delta, .monotonic);
         } else {
@@ -563,7 +563,7 @@ pub const atomic = struct {
     }
 
     /// Atomic load
-    pub fn load(comptime T: type, ptr: *const T, comptime ordering: std.lang.AtomicOrder) T {
+    pub fn load(T: type, ptr: *const T, comptime ordering: std.lang.AtomicOrder) T {
         if (has_native_atomics) {
             return @atomicLoad(T, ptr, ordering);
         } else {
@@ -575,7 +575,7 @@ pub const atomic = struct {
     }
 
     /// Atomic store
-    pub fn store(comptime T: type, ptr: *T, value: T, comptime ordering: std.lang.AtomicOrder) void {
+    pub fn store(T: type, ptr: *T, value: T, comptime ordering: std.lang.AtomicOrder) void {
         if (has_native_atomics) {
             @atomicStore(T, ptr, value, ordering);
         } else {
@@ -588,7 +588,7 @@ pub const atomic = struct {
 
     /// Atomic compare and swap
     pub fn cmpxchg(
-        comptime T: type,
+        T: type,
         ptr: *T,
         expected_value: T,
         new_value: T,
@@ -612,7 +612,7 @@ pub const atomic = struct {
 
     /// Atomic read-modify-write
     pub fn rmw(
-        comptime T: type,
+        T: type,
         ptr: *T,
         comptime op: std.lang.AtomicRmwOp,
         operand: T,
diff --git a/core/src/mmio.zig b/core/src/mmio.zig
index aed1d81b5..2b0c2e796 100644
--- a/core/src/mmio.zig
+++ b/core/src/mmio.zig
@@ -1,7 +1,7 @@
 const std = @import("std");
 const assert = std.debug.assert;
 
-pub fn Mmio(comptime Packed: type) type {
+pub fn Mmio(Packed: type) type {
     @setEvalBranchQuota(2_000);
 
     const size = @bitSizeOf(Packed);
diff --git a/core/src/utilities.zig b/core/src/utilities.zig
index db0f16fe3..0447233f3 100644
--- a/core/src/utilities.zig
+++ b/core/src/utilities.zig
@@ -54,7 +54,7 @@ pub inline fn initialize_system_memories(which: enum {
 
 /// A helper class that allows operating on a slice of slices
 /// with similar operations to those of a slice.
-pub fn SliceVector(comptime Slice: type) type {
+pub fn SliceVector(Slice: type) type {
     const type_info = @typeInfo(Slice);
     if (type_info != .pointer)
         @compileError("Slice must have a slice type!");
@@ -519,7 +519,7 @@ pub const end_of_stack: *const anyopaque = blk: switch (microzig.config.stack) {
 /// A naive circular buffer implementation. At time of writing, it's intended
 /// to fill in where the deleted std.fifo.LinearFifo was used, so the API might
 /// seem unfinished.
-pub fn CircularBuffer(comptime T: type, comptime len: usize) type {
+pub fn CircularBuffer(T: type, comptime len: usize) type {
     return struct {
         items: [len]T,
         start: usize,
diff --git a/drivers/src/input/keyboard_matrix.zig b/drivers/src/input/keyboard_matrix.zig
index bb7ad2278..2827cb424 100644
--- a/drivers/src/input/keyboard_matrix.zig
+++ b/drivers/src/input/keyboard_matrix.zig
@@ -156,7 +156,7 @@ pub const Key = enum(u16) {
     };
 };
 
-inline fn busyloop(comptime N: comptime_int) void {
+inline fn busyloop(N: comptime_int) void {
     for (0..N) |_| {
         // wait some cycles so the physics does its magic and convey
         // the electrons
diff --git a/drivers/src/sensor/HTS221.zig b/drivers/src/sensor/HTS221.zig
index 520c7e2c7..a483734a3 100644
--- a/drivers/src/sensor/HTS221.zig
+++ b/drivers/src/sensor/HTS221.zig
@@ -109,7 +109,7 @@ pub const HTS221 = struct {
     // internal read buffer
     read_buffer: [2]u8 = .{ 0, 0 },
 
-    fn read_register(self: *@This(), comptime Regs: type, reg: RegsAddr) InterfaceError!Regs {
+    fn read_register(self: *@This(), Regs: type, reg: RegsAddr) InterfaceError!Regs {
         const raw = try self.read_one_byte(reg);
         return @as(Regs, @bitCast(raw));
     }
diff --git a/drivers/src/stepper/stepper.zig b/drivers/src/stepper/stepper.zig
index 27f9f7c16..ecdff78e1 100644
--- a/drivers/src/stepper/stepper.zig
+++ b/drivers/src/stepper/stepper.zig
@@ -48,7 +48,7 @@ pub const DRV8825 = struct {
     const MS_TABLE = [_]u3{ 0b000, 0b001, 0b010, 0b011, 0b100, 0b111 };
 };
 
-pub fn Stepper(comptime Driver: type) type {
+pub fn Stepper(Driver: type) type {
     return struct {
         const Self = @This();
         pub const SpeedProfile = union(enum) {
diff --git a/examples/microchip/atmega/src/blinky.zig b/examples/microchip/atmega/src/blinky.zig
index 80e653907..b513e66f2 100644
--- a/examples/microchip/atmega/src/blinky.zig
+++ b/examples/microchip/atmega/src/blinky.zig
@@ -21,7 +21,7 @@ pub fn main() void {
     }
 }
 
-pub fn busy_sleep(comptime limit: comptime_int) void {
+pub fn busy_sleep(limit: comptime_int) void {
     if (limit <= 0) @compileError("limit must be positive!");
 
     const outer = std.math.divCeil(comptime_int, limit, std.math.maxInt(u16)) catch unreachable;
diff --git a/examples/microchip/atmega/src/spi_flash_w25q.zig b/examples/microchip/atmega/src/spi_flash_w25q.zig
index 1eb2d72d8..4945e8926 100644
--- a/examples/microchip/atmega/src/spi_flash_w25q.zig
+++ b/examples/microchip/atmega/src/spi_flash_w25q.zig
@@ -273,7 +273,7 @@ fn write_hex_u24(val: u24) void {
     write_hex_u8(@truncate(val));
 }
 
-pub fn busy_sleep(comptime limit: comptime_int) void {
+pub fn busy_sleep(limit: comptime_int) void {
     if (limit <= 0) @compileError("limit must be positive!");
 
     const outer = std.math.divCeil(comptime_int, limit, std.math.maxInt(u16)) catch unreachable;
diff --git a/examples/microchip/attiny/src/blinky.zig b/examples/microchip/attiny/src/blinky.zig
index 78e7c3c41..28edd5629 100644
--- a/examples/microchip/attiny/src/blinky.zig
+++ b/examples/microchip/attiny/src/blinky.zig
@@ -16,7 +16,7 @@ pub fn main() void {
     }
 }
 
-pub fn busy_sleep(comptime limit: comptime_int) void {
+pub fn busy_sleep(limit: comptime_int) void {
     if (limit <= 0) @compileError("limit must be non-negative!");
 
     comptime var bits = 0;
diff --git a/examples/microchip/attiny/src/blinky84.zig b/examples/microchip/attiny/src/blinky84.zig
index d4900d8b0..627d2334e 100644
--- a/examples/microchip/attiny/src/blinky84.zig
+++ b/examples/microchip/attiny/src/blinky84.zig
@@ -18,7 +18,7 @@ pub fn main() void {
     }
 }
 
-pub fn busy_sleep(comptime limit: comptime_int) void {
+pub fn busy_sleep(limit: comptime_int) void {
     if (limit <= 0) @compileError("limit must be non-negative!");
 
     comptime var bits = 0;
diff --git a/examples/nxp/lpc/src/blinky.zig b/examples/nxp/lpc/src/blinky.zig
index 3b85ab938..61a55f40a 100644
--- a/examples/nxp/lpc/src/blinky.zig
+++ b/examples/nxp/lpc/src/blinky.zig
@@ -63,7 +63,7 @@ const PatchedGpio = extern struct {
     }
 };
 
-pub fn busy_sleep(comptime limit: comptime_int) void {
+pub fn busy_sleep(limit: comptime_int) void {
     if (limit <= 0) @compileError("limit must be non-negative!");
 
     comptime var bits = 0;
diff --git a/examples/texasinstruments/msp430/src/blinky.zig b/examples/texasinstruments/msp430/src/blinky.zig
index 310789f73..804107abd 100644
--- a/examples/texasinstruments/msp430/src/blinky.zig
+++ b/examples/texasinstruments/msp430/src/blinky.zig
@@ -22,7 +22,7 @@ pub fn main() void {
     }
 }
 
-pub fn busy_sleep(comptime limit: comptime_int) void {
+pub fn busy_sleep(limit: comptime_int) void {
     if (limit <= 0) @compileError("limit must be non-negative!");
 
     comptime var bits = 0;
diff --git a/modules/bounded-array/src/bounded_array.zig b/modules/bounded-array/src/bounded_array.zig
index a11d9b92d..4f482617f 100644
--- a/modules/bounded-array/src/bounded_array.zig
+++ b/modules/bounded-array/src/bounded_array.zig
@@ -15,7 +15,7 @@ const testing = std.testing;
 /// var slice = a.slice(); // a slice of the 64-byte array
 /// var a_clone = a; // creates a copy - the structure doesn't use any internal pointers
 /// ```
-pub fn BoundedArray(comptime T: type, comptime buffer_capacity: usize) type {
+pub fn BoundedArray(T: type, comptime buffer_capacity: usize) type {
     return BoundedArrayAligned(T, @alignOf(T), buffer_capacity);
 }
 
@@ -33,7 +33,7 @@ pub fn BoundedArray(comptime T: type, comptime buffer_capacity: usize) type {
 //  try testing.expectEqual(@as(u16, 65535), b[0]);
 /// ```
 pub fn BoundedArrayAligned(
-    comptime T: type,
+    T: type,
     comptime alignment: u29,
     comptime buffer_capacity: usize,
 ) type {
diff --git a/modules/freertos/src/config.zig b/modules/freertos/src/config.zig
index a14d916d8..4c78bc739 100644
--- a/modules/freertos/src/config.zig
+++ b/modules/freertos/src/config.zig
@@ -85,7 +85,7 @@ pub fn check_true(rc: BaseType) bool {
 }
 
 /// Convert a nullable C handle to a Zig optional, returning OutOfMemory if null.
-pub fn check_handle(comptime T: type, handle: T) Error!T {
+pub fn check_handle(T: type, handle: T) Error!T {
     if (handle == null) return error.OutOfMemory;
     return handle;
 }
diff --git a/modules/freertos/src/queue.zig b/modules/freertos/src/queue.zig
index 9288cbc1b..06536711c 100644
--- a/modules/freertos/src/queue.zig
+++ b/modules/freertos/src/queue.zig
@@ -29,7 +29,7 @@ pub const ISR_Result = struct {
 };
 
 /// Result from an ISR receive operation.
-pub fn IsrReceiveResult(comptime T: type) type {
+pub fn IsrReceiveResult(T: type) type {
     return struct {
         /// The received item.
         item: T,
@@ -41,7 +41,7 @@ pub fn IsrReceiveResult(comptime T: type) type {
 // ── Generic Queue ───────────────────────────────────────────────────────
 
 /// A type-safe FreeRTOS queue holding items of type `T`.
-pub fn Queue(comptime T: type) type {
+pub fn Queue(T: type) type {
     return struct {
         const Self = @This();
         /// Underlying FreeRTOS C handle. Use `freertos.c` for direct C API access.
@@ -166,6 +166,6 @@ pub fn Queue(comptime T: type) type {
 // ── Top-Level Convenience ───────────────────────────────────────────────
 
 /// Create a new queue holding items of type `T` with the given capacity.
-pub fn create(comptime T: type, length: u32) Error!Queue(T) {
+pub fn create(T: type, length: u32) Error!Queue(T) {
     return Queue(T).create(length);
 }
diff --git a/modules/rtt/src/lock.zig b/modules/rtt/src/lock.zig
index 4555efdc1..5cba16ffa 100644
--- a/modules/rtt/src/lock.zig
+++ b/modules/rtt/src/lock.zig
@@ -3,7 +3,7 @@ const builtin = @import("builtin");
 
 /// A generic struct that provides exclusive access to the RTT control block
 pub fn GenericLock(
-    comptime Context: type,
+    Context: type,
     comptime lock_fn: fn (context: Context) void,
     comptime unlock_fn: fn (context: Context) void,
 ) type {
diff --git a/port/espressif/esp/src/hal/atomic.zig b/port/espressif/esp/src/hal/atomic.zig
index d493a904d..8bbc6005b 100644
--- a/port/espressif/esp/src/hal/atomic.zig
+++ b/port/espressif/esp/src/hal/atomic.zig
@@ -5,7 +5,7 @@ const microzig = @import("microzig");
 
 const largest_atomic_size = @sizeOf(usize);
 
-inline fn atomic_store(comptime T: type, ptr: *volatile T, val: T, _: i32) void {
+inline fn atomic_store(T: type, ptr: *volatile T, val: T, _: i32) void {
     if (@sizeOf(T) > largest_atomic_size) {
         @compileError("only supports types with a size of less than 4");
     }
@@ -13,7 +13,7 @@ inline fn atomic_store(comptime T: type, ptr: *volatile T, val: T, _: i32) void
     ptr.* = val;
 }
 
-inline fn atomic_load(comptime T: type, ptr: *volatile T, _: i32) T {
+inline fn atomic_load(T: type, ptr: *volatile T, _: i32) T {
     if (@sizeOf(T) > largest_atomic_size) {
         @compileError("only supports types with a size of less than 4");
     }
@@ -21,7 +21,7 @@ inline fn atomic_load(comptime T: type, ptr: *volatile T, _: i32) T {
     return ptr.*;
 }
 
-inline fn atomic_rmw(comptime T: type, ptr: *volatile T, val: T, _: i32, comptime op: std.lang.AtomicRmwOp) T {
+inline fn atomic_rmw(T: type, ptr: *volatile T, val: T, _: i32, comptime op: std.lang.AtomicRmwOp) T {
     const cs = microzig.interrupt.enter_critical_section();
     defer cs.leave();
 
@@ -42,7 +42,7 @@ inline fn atomic_rmw(comptime T: type, ptr: *volatile T, val: T, _: i32, comptim
     return tmp;
 }
 
-inline fn atomic_compare_exchange(comptime T: type, ptr: *volatile T, expected: *T, desired: T, _: i32, _: i32) bool {
+inline fn atomic_compare_exchange(T: type, ptr: *volatile T, expected: *T, desired: T, _: i32, _: i32) bool {
     const cs = microzig.interrupt.enter_critical_section();
     defer cs.leave();
 
diff --git a/port/espressif/esp/src/hal/uart.zig b/port/espressif/esp/src/hal/uart.zig
index cbb7aa1d7..67a5a0040 100644
--- a/port/espressif/esp/src/hal/uart.zig
+++ b/port/espressif/esp/src/hal/uart.zig
@@ -4,11 +4,11 @@ const peripherals = microzig.chip.peripherals;
 
 // TODO: chip independent. currently specific to esp32c3.
 
-fn reg(comptime index: comptime_int) @TypeOf(@field(peripherals, std.fmt.comptimePrint("UART{}", .{index}))) {
+fn reg(index: comptime_int) @TypeOf(@field(peripherals, std.fmt.comptimePrint("UART{}", .{index}))) {
     return @field(peripherals, std.fmt.comptimePrint("UART{}", .{index}));
 }
 
-pub fn write(comptime index: comptime_int, slice: []const u8) void {
+pub fn write(index: comptime_int, slice: []const u8) void {
     const r = reg(index);
     for (slice) |c| {
         while (r.STATUS.read().TXFIFO_CNT > 8) {}
diff --git a/port/gigadevice/gd32/src/hals/GD32VF103.zig b/port/gigadevice/gd32/src/hals/GD32VF103.zig
index d5eb900ae..9e237f57d 100644
--- a/port/gigadevice/gd32/src/hals/GD32VF103.zig
+++ b/port/gigadevice/gd32/src/hals/GD32VF103.zig
@@ -31,22 +31,22 @@ fn set_reg_field(reg: anytype, comptime field_name: anytype, value: anytype) voi
 }
 
 pub const gpio = struct {
-    pub fn set_output(comptime pin: type) void {
+    pub fn set_output(pin: type) void {
         _ = pin;
         // TODO: check if pin is already configured as output
     }
-    pub fn set_input(comptime pin: type) void {
+    pub fn set_input(pin: type) void {
         _ = pin;
         // TODO: check if pin is already configured as input
     }
 
-    pub fn read(comptime pin: type) microzig.gpio.State {
+    pub fn read(pin: type) microzig.gpio.State {
         _ = pin;
         // TODO: check if pin is configured as input
         return .low;
     }
 
-    pub fn write(comptime pin: type, state: microzig.gpio.State) void {
+    pub fn write(pin: type, state: microzig.gpio.State) void {
         _ = pin;
         _ = state;
         // TODO: check if pin is configured as output
diff --git a/port/microchip/attiny/src/hals/attiny85/progmem.zig b/port/microchip/attiny/src/hals/attiny85/progmem.zig
index 0e0ba29fb..7a766d984 100644
--- a/port/microchip/attiny/src/hals/attiny85/progmem.zig
+++ b/port/microchip/attiny/src/hals/attiny85/progmem.zig
@@ -1,4 +1,4 @@
-pub fn Table(comptime T: type, comptime len: usize, comptime values: [len]T) type {
+pub fn Table(T: type, comptime len: usize, comptime values: [len]T) type {
     return struct {
         pub const data linksection(".progmem.data") = values;
 
@@ -8,7 +8,7 @@ pub fn Table(comptime T: type, comptime len: usize, comptime values: [len]T) typ
     };
 }
 
-pub inline fn read(comptime T: type, ptr: *const T) T {
+pub inline fn read(T: type, ptr: *const T) T {
     return ptr.*;
 }
 
diff --git a/port/nxp/lpc/src/hals/LPC176x5x.zig b/port/nxp/lpc/src/hals/LPC176x5x.zig
index 084a0937d..bc4ed9a6b 100644
--- a/port/nxp/lpc/src/hals/LPC176x5x.zig
+++ b/port/nxp/lpc/src/hals/LPC176x5x.zig
@@ -61,28 +61,28 @@ pub fn parse_pin(comptime spec: []const u8) type {
     };
 }
 
-pub fn route_pin(comptime pin: type, function: PinTarget) void {
+pub fn route_pin(pin: type, function: PinTarget) void {
     var val = pin.regs.pinsel_reg.read();
     @field(val, pin.regs.pinsel_field) = @backingInt(function);
     pin.regs.pinsel_reg.write(val);
 }
 
 pub const gpio = struct {
-    pub fn set_output(comptime pin: type) void {
+    pub fn set_output(pin: type) void {
         pin.regs.dir.raw |= pin.gpio_mask;
     }
-    pub fn set_input(comptime pin: type) void {
+    pub fn set_input(pin: type) void {
         pin.regs.dir.raw &= ~pin.gpio_mask;
     }
 
-    pub fn read(comptime pin: type) microzig.gpio.State {
+    pub fn read(pin: type) microzig.gpio.State {
         return if ((pin.regs.pin.raw & pin.gpio_mask) != 0)
             microzig.gpio.State.high
         else
             microzig.gpio.State.low;
     }
 
-    pub fn write(comptime pin: type, state: microzig.gpio.State) void {
+    pub fn write(pin: type, state: microzig.gpio.State) void {
         if (state == .high) {
             pin.regs.set.raw = pin.gpio_mask;
         } else {
diff --git a/port/nxp/mcx/src/mcxn947/scripts/generate.zig b/port/nxp/mcx/src/mcxn947/scripts/generate.zig
index 9da58ecd0..4fd7ea2d3 100644
--- a/port/nxp/mcx/src/mcxn947/scripts/generate.zig
+++ b/port/nxp/mcx/src/mcxn947/scripts/generate.zig
@@ -64,7 +64,7 @@ pub fn print_fields(comptime ty: []const u8, comptime suffix_: ?[]const u8) []Fi
 
 /// For a given packed structure `T`, this function returns
 /// the bit index its the field named `field_name`.
-fn get_field_offset(comptime T: type, comptime field_name: []const u8) u8 {
+fn get_field_offset(T: type, comptime field_name: []const u8) u8 {
     std.debug.assert(@typeInfo(T) == .@"struct");
     std.debug.assert(std.meta.containerLayout(T) == .@"packed");
     std.debug.assert(std.meta.fieldIndex(T, field_name) != null);
diff --git a/port/raspberrypi/rp2xxx/src/hal/adc.zig b/port/raspberrypi/rp2xxx/src/hal/adc.zig
index 38884925a..6f3bf8eb8 100644
--- a/port/raspberrypi/rp2xxx/src/hal/adc.zig
+++ b/port/raspberrypi/rp2xxx/src/hal/adc.zig
@@ -159,7 +159,7 @@ pub fn set_temp_sensor_enabled(enable: bool) void {
 }
 
 /// T must be floating point.
-pub fn temp_sensor_result_to_celcius(comptime T: type, comptime vref: T, result: u12) T {
+pub fn temp_sensor_result_to_celcius(T: type, comptime vref: T, result: u12) T {
     // TODO: consider fixed-point
     const raw = @as(T, @floatFromInt(result));
     const voltage: T = vref * raw / 0x0fff;
diff --git a/port/raspberrypi/rp2xxx/src/hal/atomic.zig b/port/raspberrypi/rp2xxx/src/hal/atomic.zig
index bd4a1b7bd..85eb9acee 100644
--- a/port/raspberrypi/rp2xxx/src/hal/atomic.zig
+++ b/port/raspberrypi/rp2xxx/src/hal/atomic.zig
@@ -21,20 +21,20 @@ inline fn atomic_unlock(critical_section: CriticalSection) void {
     atomic_spinlock.unlock_irq(critical_section);
 }
 
-fn atomic_store(comptime T: type, ptr: *volatile T, val: T, _: i32) void {
+fn atomic_store(T: type, ptr: *volatile T, val: T, _: i32) void {
     const save = atomic_lock();
     defer atomic_unlock(save);
     ptr.* = val;
 }
 
-fn atomic_load(comptime T: type, ptr: *volatile T, _: i32) T {
+fn atomic_load(T: type, ptr: *volatile T, _: i32) T {
     const save = atomic_lock();
     defer atomic_unlock(save);
     const val = ptr.*;
     return val;
 }
 
-fn atomic_rmw(comptime T: type, ptr: *volatile T, val: T, _: i32, comptime op: std.lang.AtomicRmwOp) T {
+fn atomic_rmw(T: type, ptr: *volatile T, val: T, _: i32, comptime op: std.lang.AtomicRmwOp) T {
     const save = atomic_lock();
     defer atomic_unlock(save);
     const tmp = ptr.*;
@@ -54,7 +54,7 @@ fn atomic_rmw(comptime T: type, ptr: *volatile T, val: T, _: i32, comptime op: s
     return tmp;
 }
 
-fn atomic_compare_exchange(comptime T: type, ptr: *volatile T, expected: *T, desired: T, _: i32, _: i32) bool {
+fn atomic_compare_exchange(T: type, ptr: *volatile T, expected: *T, desired: T, _: i32, _: i32) bool {
     const save = atomic_lock();
     defer atomic_unlock(save);
     const old_value = ptr.*;
diff --git a/port/raspberrypi/rp2xxx/src/hal/pio/assembler.zig b/port/raspberrypi/rp2xxx/src/hal/pio/assembler.zig
index c27e8693b..1b77a350e 100644
--- a/port/raspberrypi/rp2xxx/src/hal/pio/assembler.zig
+++ b/port/raspberrypi/rp2xxx/src/hal/pio/assembler.zig
@@ -89,7 +89,7 @@ pub const Diagnostics = struct {
 };
 
 /// Creates a copy of a slice at comptime that is guaranteed to be immutable.
-fn comptime_copy(comptime T: type, comptime slice: []const T) []const T {
+fn comptime_copy(T: type, comptime slice: []const T) []const T {
     const arr: [slice.len]T = slice[0..slice.len].*;
     return &arr;
 }
diff --git a/port/raspberrypi/rp2xxx/src/hal/pio/assembler/encoder.zig b/port/raspberrypi/rp2xxx/src/hal/pio/assembler/encoder.zig
index a8d6d495f..b22b0a479 100644
--- a/port/raspberrypi/rp2xxx/src/hal/pio/assembler/encoder.zig
+++ b/port/raspberrypi/rp2xxx/src/hal/pio/assembler/encoder.zig
@@ -155,7 +155,7 @@ pub fn Encoder(comptime chip: Chip, comptime options: Options) type {
         }
 
         fn evaluate_impl(
-            comptime T: type,
+            T: type,
             define_lists: []const []const DefineWithIndex,
             value: Value,
             index: u32,
@@ -205,7 +205,7 @@ pub fn Encoder(comptime chip: Chip, comptime options: Options) type {
 
         fn evaluate(
             self: *Self,
-            comptime T: type,
+            T: type,
             program: BoundedProgram,
             value: Value,
             index: u32,
@@ -234,7 +234,7 @@ pub fn Encoder(comptime chip: Chip, comptime options: Options) type {
 
         fn evaluate_global(
             self: *Self,
-            comptime T: type,
+            T: type,
             value: Value,
             index: u32,
             diags: *?Diagnostics,
diff --git a/port/raspberrypi/rp2xxx/src/hal/pio/common.zig b/port/raspberrypi/rp2xxx/src/hal/pio/common.zig
index dfa5a0102..46da37c8e 100644
--- a/port/raspberrypi/rp2xxx/src/hal/pio/common.zig
+++ b/port/raspberrypi/rp2xxx/src/hal/pio/common.zig
@@ -95,7 +95,7 @@ pub const ExecOptions = struct {
     side_set_optional: bool = false,
 };
 
-pub fn PinMapping(comptime Count: type) type {
+pub fn PinMapping(Count: type) type {
     return struct {
         /// Creates a mapping with a single pin, length 1
         pub fn single(pin: gpio.Pin) PinMapping(Count) {
diff --git a/port/raspberrypi/rp2xxx/src/hal/spi.zig b/port/raspberrypi/rp2xxx/src/hal/spi.zig
index 916beb452..9ce59fc7e 100644
--- a/port/raspberrypi/rp2xxx/src/hal/spi.zig
+++ b/port/raspberrypi/rp2xxx/src/hal/spi.zig
@@ -179,7 +179,7 @@ pub const SPI = enum(u1) {
         return spi.get_regs().SSPSR.read().RNE == 1;
     }
 
-    fn validate_bitwidth(comptime PacketType: type) void {
+    fn validate_bitwidth(PacketType: type) void {
         if (@bitSizeOf(PacketType) < 4 or @bitSizeOf(PacketType) > 16)
             @compileError("PacketType must be a datatype with a size between 4 and 16 bits inclusive");
     }
@@ -202,7 +202,7 @@ pub const SPI = enum(u1) {
 
     /// Disable SPI, pre-fill the TX FIFO as much as possible, and then re-enable to start transmission.
     /// Leads to performance gains in thoroughput. Returns how many bytes were consumed from src.
-    fn prime_tx_fifo(spi: SPI, comptime PacketType: type, src_iter: *microzig.utilities.SliceVector([]const PacketType).Iterator) usize {
+    fn prime_tx_fifo(spi: SPI, PacketType: type, src_iter: *microzig.utilities.SliceVector([]const PacketType).Iterator) usize {
         const spi_regs = spi.get_regs();
         spi_regs.SSPCR1.modify(.{
             .SSE = 0,
@@ -221,7 +221,7 @@ pub const SPI = enum(u1) {
     }
 
     /// Same as prime_tx_fifo but for a repeated byte.
-    fn prime_tx_fifo_repeated(spi: SPI, comptime PacketType: type, repeated_byte: PacketType, repeat_count: usize) usize {
+    fn prime_tx_fifo_repeated(spi: SPI, PacketType: type, repeated_byte: PacketType, repeat_count: usize) usize {
         const spi_regs = spi.get_regs();
         spi_regs.SSPCR1.modify(.{
             .SSE = 0,
@@ -242,7 +242,7 @@ pub const SPI = enum(u1) {
     /// PacketType specifies the bit width of each packet using any of
     /// the types u4, u5, ..., u16. Data truncation is possible if this
     /// doesn't match the peripheral's configured bit width.
-    pub fn transceive_blocking(spi: SPI, comptime PacketType: type, src: []const PacketType, dst: []PacketType) void {
+    pub fn transceive_blocking(spi: SPI, PacketType: type, src: []const PacketType, dst: []PacketType) void {
         return spi.transceive_vecs_blocking(PacketType, &.{src}, &.{dst});
     }
 
@@ -257,7 +257,7 @@ pub const SPI = enum(u1) {
     ///       suffixes won't need to be concatenated/inserted to the original buffer, but can be managed
     ///       in a separate memory.
     ///
-    pub fn transceive_vecs_blocking(spi: SPI, comptime PacketType: type, src_vecs: []const []const PacketType, dst_vecs: []const []PacketType) void {
+    pub fn transceive_vecs_blocking(spi: SPI, PacketType: type, src_vecs: []const []const PacketType, dst_vecs: []const []PacketType) void {
         comptime validate_bitwidth(PacketType);
 
         const src_data = microzig.utilities.SliceVector([]const PacketType).init(src_vecs);
@@ -298,7 +298,7 @@ pub const SPI = enum(u1) {
     /// PacketType specifies the bit width of each packet using any of
     /// the types u4, u5, ..., u16. Data truncation is possible if this
     /// doesn't match the peripheral's configured bit width.
-    pub fn write_blocking(spi: SPI, comptime PacketType: type, src: []const PacketType) void {
+    pub fn write_blocking(spi: SPI, PacketType: type, src: []const PacketType) void {
         return spi.writev_blocking(PacketType, &.{src});
     }
 
@@ -312,7 +312,7 @@ pub const SPI = enum(u1) {
     /// PacketType specifies the bit width of each packet using any of
     /// the types u4, u5, ..., u16. Data truncation is possible if this
     /// doesn't match the peripheral's configured bit width.
-    pub fn writev_blocking(spi: SPI, comptime PacketType: type, src_vec: []const []const PacketType) void {
+    pub fn writev_blocking(spi: SPI, PacketType: type, src_vec: []const []const PacketType) void {
         comptime validate_bitwidth(PacketType);
 
         var src_iter = microzig.utilities.SliceVector([]const u8).init(src_vec).iterator();
@@ -354,7 +354,7 @@ pub const SPI = enum(u1) {
     /// PacketType specifies the bit width of each packet using any of
     /// the types u4, u5, ..., u16. Data truncation is possible if this
     /// doesn't match the peripheral's configured bit width.
-    pub fn read_blocking(spi: SPI, comptime PacketType: type, repeated_tx_data: PacketType, dst: []PacketType) void {
+    pub fn read_blocking(spi: SPI, PacketType: type, repeated_tx_data: PacketType, dst: []PacketType) void {
         return spi.readv_blocking(PacketType, repeated_tx_data, &.{dst});
     }
 
@@ -371,7 +371,7 @@ pub const SPI = enum(u1) {
     /// PacketType specifies the bit width of each packet using any of
     /// the types u4, u5, ..., u16. Data truncation is possible if this
     /// doesn't match the peripheral's configured bit width.
-    pub fn readv_blocking(spi: SPI, comptime PacketType: type, repeated_tx_data: PacketType, dst_vec: []const []PacketType) void {
+    pub fn readv_blocking(spi: SPI, PacketType: type, repeated_tx_data: PacketType, dst_vec: []const []PacketType) void {
         comptime validate_bitwidth(PacketType);
 
         const dst_data = microzig.utilities.SliceVector([]PacketType).init(dst_vec);
diff --git a/port/stmicro/stm32/src/hals/STM32F407.zig b/port/stmicro/stm32/src/hals/STM32F407.zig
index b1b802cf7..4e2991f3e 100644
--- a/port/stmicro/stm32/src/hals/STM32F407.zig
+++ b/port/stmicro/stm32/src/hals/STM32F407.zig
@@ -97,17 +97,17 @@ pub const gpio = struct {
         af15,
     };
 
-    pub fn set_output(comptime pin: type) void {
+    pub fn set_output(pin: type) void {
         set_reg_field(RCC.AHB1ENR, "GPIO" ++ pin.gpio_port_name ++ "EN", 1);
         set_reg_field(@field(pin.gpio_port, "MODER"), "MODER" ++ pin.suffix, 0b01);
     }
 
-    pub fn set_input(comptime pin: type) void {
+    pub fn set_input(pin: type) void {
         set_reg_field(RCC.AHB1ENR, "GPIO" ++ pin.gpio_port_name ++ "EN", 1);
         set_reg_field(@field(pin.gpio_port, "MODER"), "MODER" ++ pin.suffix, 0b00);
     }
 
-    pub fn set_alternate_function(comptime pin: type, af: AlternateFunction) void {
+    pub fn set_alternate_function(pin: type, af: AlternateFunction) void {
         set_reg_field(RCC.AHB1ENR, "GPIO" ++ pin.gpio_port_name ++ "EN", 1);
         set_reg_field(@field(pin.gpio_port, "MODER"), "MODER" ++ pin.suffix, 0b10);
         if (pin.pin_number < 8) {
@@ -117,13 +117,13 @@ pub const gpio = struct {
         }
     }
 
-    pub fn read(comptime pin: type) microzig.gpio.State {
+    pub fn read(pin: type) microzig.gpio.State {
         const idr_reg = pin.gpio_port.IDR;
         const reg_value = @field(idr_reg.read(), "IDR" ++ pin.suffix); // TODO extract to getRegField()?
         return @as(microzig.gpio.State, @fromBackingInt(reg_value));
     }
 
-    pub fn write(comptime pin: type, state: microzig.gpio.State) void {
+    pub fn write(pin: type, state: microzig.gpio.State) void {
         switch (state) {
             .low => set_reg_field(pin.gpio_port.BSRR, "BR" ++ pin.suffix, 1),
             .high => set_reg_field(pin.gpio_port.BSRR, "BS" ++ pin.suffix, 1),
@@ -155,7 +155,7 @@ pub const uart = struct {
     const PinDirection = std.meta.FieldEnum(microzig.uart.Pins);
 
     /// Checks if a pin is valid for a given uart index and direction
-    pub fn is_valid_pin(comptime pin: type, comptime index: usize, comptime direction: PinDirection) bool {
+    pub fn is_valid_pin(pin: type, comptime index: usize, comptime direction: PinDirection) bool {
         const pin_name = pin.name;
 
         return switch (direction) {
@@ -364,7 +364,7 @@ pub const i2c = struct {
     const PinLine = std.meta.FieldEnum(microzig.i2c.Pins);
 
     /// Checks if a pin is valid for a given i2c index and line
-    pub fn is_valid_pin(comptime pin: type, comptime index: usize, comptime line: PinLine) bool {
+    pub fn is_valid_pin(pin: type, comptime index: usize, comptime line: PinLine) bool {
         const pin_name = pin.name;
 
         return switch (line) {
diff --git a/port/stmicro/stm32/src/hals/common/enums.zig b/port/stmicro/stm32/src/hals/common/enums.zig
index 9668f84de..03f347eee 100644
--- a/port/stmicro/stm32/src/hals/common/enums.zig
+++ b/port/stmicro/stm32/src/hals/common/enums.zig
@@ -46,7 +46,7 @@ pub fn to_peripheral(comptime val: anytype) Peripherals {
     };
 }
 
-pub fn get_regs(comptime T: type, comptime val: anytype) *volatile T {
+pub fn get_regs(T: type, comptime val: anytype) *volatile T {
     const periph_enum = comptime to_peripheral(val);
     return @field(microzig.chip.peripherals, @tagName(periph_enum));
 }
diff --git a/port/stmicro/stm32/src/hals/common/util.zig b/port/stmicro/stm32/src/hals/common/util.zig
index 26a8b09e3..25da8f6ef 100644
--- a/port/stmicro/stm32/src/hals/common/util.zig
+++ b/port/stmicro/stm32/src/hals/common/util.zig
@@ -29,7 +29,7 @@ pub fn create_peripheral_enum(comptime bases_name: []const []const u8) type {
     return @Enum(usize, .exhaustive, field_names, field_values[0..]);
 }
 
-pub fn sub_peripheral_enum(comptime T: type, comptime keep_name: []const []const u8, match_type: ?[]const u8) type {
+pub fn sub_peripheral_enum(T: type, comptime keep_name: []const []const u8, match_type: ?[]const u8) type {
     var field_names: []const []const u8 = &.{};
     var field_values: []const usize = &.{};
     @setEvalBranchQuota(10_000);
diff --git a/port/wch/ch32v/src/hals/ch32v003/pins.zig b/port/wch/ch32v/src/hals/ch32v003/pins.zig
index 27b671798..680e039e8 100644
--- a/port/wch/ch32v/src/hals/ch32v003/pins.zig
+++ b/port/wch/ch32v/src/hals/ch32v003/pins.zig
@@ -74,7 +74,7 @@ pub fn GPIO(comptime port: u3, comptime num: u4, comptime mode: gpio.Mode) type
     };
 }
 
-fn get_tag_name_by_index(comptime T: type, comptime index: usize) []const u8 {
+fn get_tag_name_by_index(T: type, comptime index: usize) []const u8 {
     const field_names = @typeInfo(T).@"enum".field_names;
     if (index >= field_names.len) {
         @compileError("Index is out of enum members.");
diff --git a/port/wch/ch32v/src/hals/pins.zig b/port/wch/ch32v/src/hals/pins.zig
index 3b36b59e6..28160dc65 100644
--- a/port/wch/ch32v/src/hals/pins.zig
+++ b/port/wch/ch32v/src/hals/pins.zig
@@ -82,7 +82,7 @@ pub fn GPIO(comptime port: u3, comptime num: u4, comptime mode: gpio.Mode) type
     };
 }
 
-fn get_tag_name_by_index(comptime T: type, comptime index: usize) []const u8 {
+fn get_tag_name_by_index(T: type, comptime index: usize) []const u8 {
     const field_names = @typeInfo(T).@"enum".field_names;
     if (index >= field_names.len) {
         @compileError("Index is out of enum members.");
diff --git a/port/wch/ch32v/src/hals/usbd.zig b/port/wch/ch32v/src/hals/usbd.zig
index 910d433ad..2c37b0a6d 100644
--- a/port/wch/ch32v/src/hals/usbd.zig
+++ b/port/wch/ch32v/src/hals/usbd.zig
@@ -305,7 +305,7 @@ const EP_State = struct {
     tx_busy: bool = false,
 };
 
-fn PerEndpointArray(comptime N: comptime_int) type {
+fn PerEndpointArray(N: comptime_int) type {
     return [N][2]EP_State; // [ep][dir]
 }
 
diff --git a/port/wch/ch32v/src/hals/usbfs.zig b/port/wch/ch32v/src/hals/usbfs.zig
index 9ebf31670..5d92bb4b7 100644
--- a/port/wch/ch32v/src/hals/usbfs.zig
+++ b/port/wch/ch32v/src/hals/usbfs.zig
@@ -44,7 +44,7 @@ const EP_State = struct {
     tx_busy: bool = false,
 };
 
-fn PerEndpointArray(comptime N: comptime_int) type {
+fn PerEndpointArray(N: comptime_int) type {
     return [N][2]EP_State; // [ep][dir]
 }
 
diff --git a/port/wch/ch32v/src/hals/usbhs.zig b/port/wch/ch32v/src/hals/usbhs.zig
index a1ef04ccc..e76301f1a 100644
--- a/port/wch/ch32v/src/hals/usbhs.zig
+++ b/port/wch/ch32v/src/hals/usbhs.zig
@@ -45,7 +45,7 @@ const EP_State = struct {
     tx_busy: bool = false,
 };
 
-fn PerEndpointArray(comptime N: comptime_int) type {
+fn PerEndpointArray(N: comptime_int) type {
     return [N][2]EP_State; // [ep][dir]
 }
 
diff --git a/sim/aviron/src/lib/bus.zig b/sim/aviron/src/lib/bus.zig
index 4f80c878d..a81e23aa7 100644
--- a/sim/aviron/src/lib/bus.zig
+++ b/sim/aviron/src/lib/bus.zig
@@ -31,7 +31,7 @@ pub const Flash = struct {
         return 0;
     }
 
-    pub fn Static(comptime size: comptime_int) type {
+    pub fn Static(size: comptime_int) type {
         if ((size & 1) != 0)
             @compileError("size must be a multiple of two!");
         return struct {
@@ -159,7 +159,7 @@ pub const BusConfig = struct {
 };
 
 /// IO Bus interface with masked writes as the primary write method
-pub fn IOBusInterface(comptime address_type: type) type {
+pub fn IOBusInterface(address_type: type) type {
     return struct {
         const Self = @This();
         pub const Address = address_type;
@@ -227,7 +227,7 @@ pub fn Bus(comptime config: BusConfig) type {
 
 /// Fixed-size memory device with byte-addressable read/write operations
 /// Takes an optional bus_config parameter. If not provided, uses the smallest address width needed.
-pub fn FixedSizeMemory(comptime size: comptime_int, comptime bus_config: ?BusConfig) type {
+pub fn FixedSizeMemory(size: comptime_int, comptime bus_config: ?BusConfig) type {
     const default_addr_type = if (size <= 256) u8 else if (size <= 65536) u16 else u24;
     const config = bus_config orelse BusConfig{ .address_type = default_addr_type };
 
@@ -263,7 +263,7 @@ pub fn FixedSizeMemory(comptime size: comptime_int, comptime bus_config: ?BusCon
 }
 
 /// A logical memory space composed of non-overlapping segments.
-pub fn MemoryMapping(comptime BusType: type) type {
+pub fn MemoryMapping(BusType: type) type {
     return struct {
         const Self = @This();
 
diff --git a/sim/aviron/tools/generate_tables.zig b/sim/aviron/tools/generate_tables.zig
index 2a8c69ef3..d68ebbe3d 100644
--- a/sim/aviron/tools/generate_tables.zig
+++ b/sim/aviron/tools/generate_tables.zig
@@ -4,7 +4,7 @@ const isa = @import("isa");
 
 const BoundedArray = @import("bounded-array").BoundedArray;
 
-fn string_to_enum(comptime T: type, str: []const u8) ?T {
+fn string_to_enum(T: type, str: []const u8) ?T {
     inline for (@typeInfo(T).@"enum".field_names) |field_name| {
         if (std.mem.eql(u8, str, field_name)) {
             return @field(T, field_name);
diff --git a/tools/flags/src/root.zig b/tools/flags/src/root.zig
index b35e984b8..0af1a2470 100644
--- a/tools/flags/src/root.zig
+++ b/tools/flags/src/root.zig
@@ -23,7 +23,7 @@ const label_prefix = "--";
 /// Flags must have a `default` decl.
 ///
 /// - Integers can use decimal, octal, or hexidecimal formats
-pub fn parse(comptime Flags: type, arena: Allocator, args: []const []const u8) !struct { Flags, Positionals } {
+pub fn parse(Flags: type, arena: Allocator, args: []const []const u8) !struct { Flags, Positionals } {
     _ = arena;
     var flags: Flags = .default;
     return outer: for (args[1..], 1..) |arg, i| {
@@ -46,7 +46,7 @@ pub fn parse(comptime Flags: type, arena: Allocator, args: []const []const u8) !
     } else .{ flags, &.{} };
 }
 
-fn parse_value(comptime T: type, key: []const u8, value: []const u8, equals: ?usize) !T {
+fn parse_value(T: type, key: []const u8, value: []const u8, equals: ?usize) !T {
     const field_info = @typeInfo(T);
     return switch (T) {
         []const u8 => value,
diff --git a/tools/printer/src/DebugInfo.zig b/tools/printer/src/DebugInfo.zig
index 0c2cbfc42..e018fdb58 100644
--- a/tools/printer/src/DebugInfo.zig
+++ b/tools/printer/src/DebugInfo.zig
@@ -769,7 +769,7 @@ const Parser = struct {
             }
         }
 
-        fn get_uint(fv: FormValue, comptime U: type) !U {
+        fn get_uint(fv: FormValue, U: type) !U {
             return switch (fv) {
                 inline .udata,
                 .sdata,
diff --git a/tools/regz/src/Database.zig b/tools/regz/src/Database.zig
index dc7e661a0..8b5c4efcf 100644
--- a/tools/regz/src/Database.zig
+++ b/tools/regz/src/Database.zig
@@ -418,7 +418,7 @@ pub const StructLayout = enum {
     pub const BaseType = []const u8;
 };
 
-fn gen_field_list(comptime T: type, opts: struct { prefix: ?[]const u8 = null }) []const u8 {
+fn gen_field_list(T: type, opts: struct { prefix: ?[]const u8 = null }) []const u8 {
     var buf: [4096]u8 = undefined;
     var fbs: std.Io.Writer = .fixed(&buf);
 
@@ -436,7 +436,7 @@ fn gen_field_list(comptime T: type, opts: struct { prefix: ?[]const u8 = null })
     return buf_copy[0..fbs.buffered().len];
 }
 
-fn zig_type_to_sql_type(comptime T: type) []const u8 {
+fn zig_type_to_sql_type(T: type) []const u8 {
     const info = @typeInfo(T);
     return switch (info) {
         .int => "INTEGER",
@@ -450,11 +450,11 @@ fn zig_type_to_sql_type(comptime T: type) []const u8 {
     };
 }
 
-fn gen_sql_table(comptime name: []const u8, comptime T: type) [:0]const u8 {
+fn gen_sql_table(comptime name: []const u8, T: type) [:0]const u8 {
     return gen_sql_table_impl(name, T) catch unreachable;
 }
 
-fn gen_sql_table_impl(comptime name: []const u8, comptime T: type) ![:0]const u8 {
+fn gen_sql_table_impl(comptime name: []const u8, T: type) ![:0]const u8 {
     var buf: [4096]u8 = undefined;
     var fbs: std.Io.Writer = .fixed(&buf);
 
@@ -579,7 +579,7 @@ pub const Format = enum {
     }
 };
 
-fn ID(comptime T: type, comptime table_name: []const u8) type {
+fn ID(T: type, comptime table_name: []const u8) type {
     return enum(T) {
         pub const BaseType = u32;
         pub const table = table_name;
@@ -812,7 +812,7 @@ pub fn get_device_id_by_name(db: *Database, name: []const u8) !?DeviceID {
     return @fromBackingInt(@intCast(row.int(0)));
 }
 
-fn scan_row(comptime T: type, allocator: Allocator, row: zqlite.Row) !T {
+fn scan_row(T: type, allocator: Allocator, row: zqlite.Row) !T {
     var entry: T = undefined;
     const info = @typeInfo(T).@"struct";
     inline for (info.field_names, info.field_types, 0..) |field_name, field_type, i| {
@@ -846,7 +846,7 @@ fn scan_row(comptime T: type, allocator: Allocator, row: zqlite.Row) !T {
     return entry;
 }
 
-fn all(db: *Database, comptime T: type, comptime query: []const u8, allocator: Allocator, args: anytype) ![]T {
+fn all(db: *Database, T: type, comptime query: []const u8, allocator: Allocator, args: anytype) ![]T {
     var rows = try db.conn.rows(query, args);
     defer rows.deinit();
 
@@ -1457,7 +1457,7 @@ fn get_parent_struct_id(db: *Database, struct_id: StructID) !StructID {
 
 fn one_alloc(
     db: *Database,
-    comptime T: type,
+    T: type,
     allocator: Allocator,
     comptime query: []const u8,
     args: anytype,
@@ -1467,7 +1467,7 @@ fn one_alloc(
 
 fn get_one_alloc(
     db: *Database,
-    comptime T: type,
+    T: type,
     allocator: Allocator,
     comptime query: []const u8,
     args: anytype,
diff --git a/tools/release/src/tar.zig b/tools/release/src/tar.zig
index 455b7a031..ebe9f3c44 100644
--- a/tools/release/src/tar.zig
+++ b/tools/release/src/tar.zig
@@ -266,7 +266,7 @@ pub fn builder(allocator: Allocator, writer: anytype) Builder(@TypeOf(writer)) {
     return Builder(@TypeOf(writer)).init(allocator, writer);
 }
 
-pub fn Builder(comptime Writer: type) type {
+pub fn Builder(Writer: type) type {
     return struct {
         writer: Writer,
         arena: std.heap.ArenaAllocator,
@@ -445,7 +445,7 @@ pub fn fileExtractor(path: []const u8, reader: anytype) FileExtractor(@TypeOf(re
     return FileExtractor(@TypeOf(reader)).init(path, reader);
 }
 
-pub fn FileExtractor(comptime ReaderType: type) type {
+pub fn FileExtractor(ReaderType: type) type {
     return struct {
         path: []const u8,
         internal: ReaderType,