diff --git a/ports/espressif/boards/adafruit_metro_esp32p4/board.c b/ports/espressif/boards/adafruit_metro_esp32p4/board.c
new file mode 100644
index 00000000000..85e13ed334d
--- /dev/null
+++ b/ports/espressif/boards/adafruit_metro_esp32p4/board.c
@@ -0,0 +1,24 @@
+// This file is part of the CircuitPython project: https://circuitpython.org
+//
+// SPDX-FileCopyrightText: Copyright (c) 2026 Limor Fried for Adafruit Industries
+//
+// SPDX-License-Identifier: MIT
+
+#include "supervisor/board.h"
+#include "esp_ldo_regulator.h"
+
+static esp_ldo_channel_handle_t io_ldo;
+
+void board_init(void) {
+    // Keep the rail acquired across simulated deep-sleep wakes.
+    if (io_ldo != NULL) {
+        return;
+    }
+
+    // The SD card and C6 control pins (GPIO39-48) require the VO4 3.3 V rail.
+    const esp_ldo_channel_config_t config = {
+        .chan_id = 4,
+        .voltage_mv = 3300,
+    };
+    ESP_ERROR_CHECK(esp_ldo_acquire_channel(&config, &io_ldo));
+}
diff --git a/ports/espressif/boards/adafruit_metro_esp32p4/mpconfigboard.h b/ports/espressif/boards/adafruit_metro_esp32p4/mpconfigboard.h
new file mode 100644
index 00000000000..b6675893027
--- /dev/null
+++ b/ports/espressif/boards/adafruit_metro_esp32p4/mpconfigboard.h
@@ -0,0 +1,30 @@
+// This file is part of the CircuitPython project: https://circuitpython.org
+//
+// SPDX-FileCopyrightText: Copyright (c) 2026 Limor Fried for Adafruit Industries
+//
+// SPDX-License-Identifier: MIT
+
+#pragma once
+
+#define MICROPY_HW_BOARD_NAME "Adafruit Metro ESP32-P4"
+#define MICROPY_HW_MCU_NAME "ESP32P4"
+
+#define MICROPY_HW_NEOPIXEL (&pin_GPIO23)
+#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO35)
+
+#define DEFAULT_I2C_BUS_SCL (&pin_GPIO32)
+#define DEFAULT_I2C_BUS_SDA (&pin_GPIO33)
+
+#define DEFAULT_SPI_BUS_SCK (&pin_GPIO15)
+#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO16)
+#define DEFAULT_SPI_BUS_MISO (&pin_GPIO17)
+
+#define DEFAULT_UART_BUS_RX (&pin_GPIO0)
+#define DEFAULT_UART_BUS_TX (&pin_GPIO1)
+
+// USB-C shares GPIO24/25 with the ROM USB Serial/JTAG downloader.
+#define CIRCUITPY_USB_DEVICE_INSTANCE 0
+#define CIRCUITPY_ESP32P4_SWAP_LSFS (1)
+
+// USB-A is connected to the dedicated high-speed PHY.
+#define CIRCUITPY_USB_HOST_INSTANCE 1
diff --git a/ports/espressif/boards/adafruit_metro_esp32p4/mpconfigboard.mk b/ports/espressif/boards/adafruit_metro_esp32p4/mpconfigboard.mk
new file mode 100644
index 00000000000..4dca7e3879a
--- /dev/null
+++ b/ports/espressif/boards/adafruit_metro_esp32p4/mpconfigboard.mk
@@ -0,0 +1,17 @@
+USB_VID = 0x239A
+USB_PID = 0x817C
+USB_PRODUCT = "Adafruit Metro ESP32-P4"
+USB_MANUFACTURER = "Adafruit"
+
+IDF_TARGET = esp32p4
+
+CIRCUITPY_USB_HOST = 1
+CIRCUITPY_ESP_HOSTED = 1
+
+CIRCUITPY_ESP_FLASH_SIZE = 16MB
+CIRCUITPY_ESP_FLASH_MODE = dio
+CIRCUITPY_ESP_FLASH_FREQ = 80m
+
+CIRCUITPY_ESP_PSRAM_SIZE = 16MB
+CIRCUITPY_ESP_PSRAM_MODE = hpi
+CIRCUITPY_ESP_PSRAM_FREQ = 200m
diff --git a/ports/espressif/boards/adafruit_metro_esp32p4/pins.c b/ports/espressif/boards/adafruit_metro_esp32p4/pins.c
new file mode 100644
index 00000000000..ee2679ae1f0
--- /dev/null
+++ b/ports/espressif/boards/adafruit_metro_esp32p4/pins.c
@@ -0,0 +1,81 @@
+// This file is part of the CircuitPython project: https://circuitpython.org
+//
+// SPDX-FileCopyrightText: Copyright (c) 2026 Limor Fried for Adafruit Industries
+//
+// SPDX-License-Identifier: MIT
+
+#include "shared-bindings/board/__init__.h"
+
+static const mp_rom_map_elem_t board_module_globals_table[] = {
+    CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
+
+    { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO49) },
+    { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO50) },
+    { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO51) },
+    { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO52) },
+    { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO53) },
+    { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO54) },
+
+    { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO0) },
+    { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO0) },
+    { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO1) },
+    { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO1) },
+    { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO2) },
+    { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO3) },
+    { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO4) },
+    { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO5) },
+    { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO6) },
+    { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO7) },
+    { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO8) },
+    { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO9) },
+    { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO10) },
+    { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO11) },
+    { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO12) },
+    { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO13) },
+    { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO13) },
+
+    { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO15) },
+    { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO16) },
+    { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO17) },
+    { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO32) },
+    { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO33) },
+
+    { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_GPIO35) },
+    { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO23) },
+    { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_GPIO18) },
+    { MP_ROM_QSTR(MP_QSTR_USB_HOST_DP), MP_ROM_PTR(&pin_USB_HS_DP) },
+    { MP_ROM_QSTR(MP_QSTR_USB_HOST_DM), MP_ROM_PTR(&pin_USB_HS_DM) },
+    { MP_ROM_QSTR(MP_QSTR_USB_HOST_POWER), MP_ROM_PTR(&pin_GPIO14) },
+    { MP_ROM_QSTR(MP_QSTR_DEBUG_TX), MP_ROM_PTR(&pin_GPIO37) },
+    { MP_ROM_QSTR(MP_QSTR_DEBUG_RX), MP_ROM_PTR(&pin_GPIO38) },
+
+    { MP_ROM_QSTR(MP_QSTR_SD_CLK), MP_ROM_PTR(&pin_GPIO43) },
+    { MP_ROM_QSTR(MP_QSTR_SD_CMD), MP_ROM_PTR(&pin_GPIO44) },
+    { MP_ROM_QSTR(MP_QSTR_SD_DATA0), MP_ROM_PTR(&pin_GPIO39) },
+    { MP_ROM_QSTR(MP_QSTR_SD_DATA1), MP_ROM_PTR(&pin_GPIO40) },
+    { MP_ROM_QSTR(MP_QSTR_SD_DATA2), MP_ROM_PTR(&pin_GPIO41) },
+    { MP_ROM_QSTR(MP_QSTR_SD_DATA3), MP_ROM_PTR(&pin_GPIO42) },
+    { MP_ROM_QSTR(MP_QSTR_SD_CD), MP_ROM_PTR(&pin_GPIO45) },
+
+    { MP_ROM_QSTR(MP_QSTR_C6_RX), MP_ROM_PTR(&pin_GPIO26) },
+    { MP_ROM_QSTR(MP_QSTR_C6_TX), MP_ROM_PTR(&pin_GPIO27) },
+    { MP_ROM_QSTR(MP_QSTR_C6_BOOT), MP_ROM_PTR(&pin_GPIO46) },
+    { MP_ROM_QSTR(MP_QSTR_C6_RESET), MP_ROM_PTR(&pin_GPIO47) },
+    { MP_ROM_QSTR(MP_QSTR_C6_WAKE), MP_ROM_PTR(&pin_GPIO48) },
+    { MP_ROM_QSTR(MP_QSTR_C6_SDIO_CLK), MP_ROM_PTR(&pin_GPIO34) },
+    { MP_ROM_QSTR(MP_QSTR_C6_SDIO_CMD), MP_ROM_PTR(&pin_GPIO36) },
+    { MP_ROM_QSTR(MP_QSTR_C6_SDIO_DATA0), MP_ROM_PTR(&pin_GPIO31) },
+    { MP_ROM_QSTR(MP_QSTR_C6_SDIO_DATA1), MP_ROM_PTR(&pin_GPIO30) },
+    { MP_ROM_QSTR(MP_QSTR_C6_SDIO_DATA2), MP_ROM_PTR(&pin_GPIO29) },
+    { MP_ROM_QSTR(MP_QSTR_C6_SDIO_DATA3), MP_ROM_PTR(&pin_GPIO28) },
+
+    { MP_ROM_QSTR(MP_QSTR_CAMERA_RESET), MP_ROM_PTR(&pin_GPIO21) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_BACKLIGHT), MP_ROM_PTR(&pin_GPIO19) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_RESET), MP_ROM_PTR(&pin_GPIO20) },
+
+    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
+    { MP_ROM_QSTR(MP_QSTR_STEMMA_I2C), MP_ROM_PTR(&board_i2c_obj) },
+    { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
+    { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
diff --git a/ports/espressif/boards/adafruit_metro_esp32p4/sdkconfig b/ports/espressif/boards/adafruit_metro_esp32p4/sdkconfig
new file mode 100644
index 00000000000..a30634b1e0d
--- /dev/null
+++ b/ports/espressif/boards/adafruit_metro_esp32p4/sdkconfig
@@ -0,0 +1,25 @@
+CONFIG_ESP32P4_SELECTS_REV_LESS_V3=y
+CONFIG_ESP32P4_REV_MIN_1=y
+CONFIG_ESP_WIFI_REMOTE_ENABLED=y
+CONFIG_ESP_WIFI_REMOTE_LIBRARY_HOSTED=y
+CONFIG_SLAVE_IDF_TARGET_ESP32C6=y
+CONFIG_ESP_HOSTED_ENABLED=y
+CONFIG_ESP_HOSTED_CP_TARGET_ESP32C6=y
+CONFIG_ESP_HOSTED_P4_DEV_BOARD_NONE=y
+CONFIG_ESP_HOSTED_SDIO_HOST_INTERFACE=y
+CONFIG_ESP_HOSTED_SDIO_SLOT_1=y
+CONFIG_ESP_HOSTED_SDIO_4_BIT_BUS=y
+CONFIG_ESP_HOSTED_PRIV_SDIO_PIN_CLK_SLOT_1=34
+CONFIG_ESP_HOSTED_PRIV_SDIO_PIN_CMD_SLOT_1=36
+CONFIG_ESP_HOSTED_PRIV_SDIO_PIN_D0_SLOT_1=31
+CONFIG_ESP_HOSTED_PRIV_SDIO_PIN_D1_4BIT_BUS_SLOT_1=30
+CONFIG_ESP_HOSTED_PRIV_SDIO_PIN_D2_4BIT_BUS_SLOT_1=29
+CONFIG_ESP_HOSTED_PRIV_SDIO_PIN_D3_4BIT_BUS_SLOT_1=28
+CONFIG_ESP_HOSTED_SDIO_GPIO_RESET_SLAVE=47
+CONFIG_ESP_HOSTED_SDIO_CLOCK_FREQ_KHZ=40000
+
+# CONFIG_WIFI_RMT_NVS_ENABLED is not set
+
+# CONFIG_ESP_WIFI_NVS_ENABLED is not set
+
+# CONFIG_ESP32_WIFI_NVS_ENABLED is not set