diff --git a/src/coreclr/jit/emit.h b/src/coreclr/jit/emit.h index 8a575992ed36f4..228a37e3be953b 100644 --- a/src/coreclr/jit/emit.h +++ b/src/coreclr/jit/emit.h @@ -4382,6 +4382,18 @@ emitAttr emitter::emitGetMemOpSize(instrDesc* id, bool ignoreEmbeddedBroadcast) memSize = defaultSize / 2; } } + else if (tupleType == INS_TT_QUARTER) + { + // Embedded broadcast supported, so either loading scalar or quarter vector + if (!ignoreEmbeddedBroadcast && HasEmbeddedBroadcast(id)) + { + memSize = GetInputSizeInBytes(id); + } + else + { + memSize = defaultSize / 4; + } + } else if (tupleType == INS_TT_FULL_MEM) { // Embedded broadcast not supported, load full vector diff --git a/src/coreclr/jit/emitxarch.cpp b/src/coreclr/jit/emitxarch.cpp index b9af5cceaa985a..2d91d0d1099a39 100644 --- a/src/coreclr/jit/emitxarch.cpp +++ b/src/coreclr/jit/emitxarch.cpp @@ -13130,6 +13130,7 @@ void emitter::emitDispIns( break; } + case INS_TT_QUARTER: case INS_TT_QUARTER_MEM: { unsigned maskElemSize = XMM_REGSIZE_BYTES / CodeGenInterface::instKMaskBaseSize(ins); @@ -17945,7 +17946,7 @@ bool emitter::TryEvexCompressDisp8Byte(instrDesc* id, ssize_t dsp, ssize_t* comp case INS_TT_HALF: { - assert(inputSize == 4); + assert((inputSize == 2) || (inputSize == 4)); if (isEmbBroadcast) { // N = input size in bytes @@ -17959,6 +17960,21 @@ bool emitter::TryEvexCompressDisp8Byte(instrDesc* id, ssize_t dsp, ssize_t* comp break; } + case INS_TT_QUARTER: + { + if (isEmbBroadcast) + { + // N = input size in bytes + disp8Compression = inputSize; + } + else + { + // N = vector length in bytes + disp8Compression = vectorLength / 4; + } + break; + } + case INS_TT_FULL_MEM: { // N = vector length in bytes diff --git a/src/coreclr/jit/instr.cpp b/src/coreclr/jit/instr.cpp index cb5c3396233539..d4647c24d8eab9 100644 --- a/src/coreclr/jit/instr.cpp +++ b/src/coreclr/jit/instr.cpp @@ -226,12 +226,22 @@ const char* CodeGen::genInsDisplayName(emitter::instrDesc* id) return GetFltCmpOpName("ps"); } + case INS_vcmpph: + { + return GetFltCmpOpName("ph"); + } + case INS_cmpsd: case INS_vcmpsd: { return GetFltCmpOpName("sd"); } + case INS_vcmpsh: + { + return GetFltCmpOpName("sh"); + } + case INS_cmpss: case INS_vcmpss: { diff --git a/src/coreclr/jit/instr.h b/src/coreclr/jit/instr.h index 208f8b79439fd2..3c6a8fe72b942e 100644 --- a/src/coreclr/jit/instr.h +++ b/src/coreclr/jit/instr.h @@ -617,7 +617,8 @@ enum insTupleType : uint16_t INS_TT_NONE = 0x0000, INS_TT_FULL = 0x0001, INS_TT_HALF = 0x0002, - INS_TT_IS_BROADCAST = static_cast(INS_TT_FULL | INS_TT_HALF), + INS_TT_QUARTER = 0x0004, + INS_TT_IS_BROADCAST = static_cast(INS_TT_FULL | INS_TT_HALF | INS_TT_QUARTER), INS_TT_FULL_MEM = 0x0010, INS_TT_TUPLE1_SCALAR = 0x0020, INS_TT_TUPLE1_FIXED = 0x0040, diff --git a/src/coreclr/jit/instrsxarch.h b/src/coreclr/jit/instrsxarch.h index fcd6e9b3e06f6b..9583ba4ed8d8eb 100644 --- a/src/coreclr/jit/instrsxarch.h +++ b/src/coreclr/jit/instrsxarch.h @@ -397,12 +397,12 @@ INST3(pmovzxbw, "vpmovzxbw", IUM_WR, BAD_CODE, BAD_CODE, INST3(pmovzxdq, "vpmovzxdq", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x35), ILLEGAL, ILLEGAL, INS_TT_HALF_MEM, Input_32Bit | KMask_Base2 | REX_W0_EVEX | Encoding_VEX | Encoding_EVEX) // Packed zero extend int to long INST3(pmovzxwd, "vpmovzxwd", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x33), ILLEGAL, ILLEGAL, INS_TT_HALF_MEM, Input_16Bit | KMask_Base4 | REX_WIG | Encoding_VEX | Encoding_EVEX) // Packed zero extend short to int INST3(pmovzxwq, "vpmovzxwq", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x34), ILLEGAL, ILLEGAL, INS_TT_QUARTER_MEM, Input_16Bit | KMask_Base2 | REX_WIG | Encoding_VEX | Encoding_EVEX) // Packed zero extend short to long -INST3(pmuldq, "vpmuldq", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x28), 5C, 2X, INS_TT_FULL, Input_32Bit | KMask_Base2 | REX_W1_EVEX | Encoding_VEX | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction | INS_FLAGS_IsAvxCommutative) // packed multiply 32-bit signed integers and store 64-bit result +INST3(pmuldq, "vpmuldq", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x28), 5C, 2X, INS_TT_FULL, Input_64Bit | KMask_Base2 | REX_W1_EVEX | Encoding_VEX | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction | INS_FLAGS_IsAvxCommutative) // packed multiply 32-bit signed integers and store 64-bit result INST3(pmulhrsw, "vpmulhrsw", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x0B), 5C, 2X, INS_TT_FULL_MEM, KMask_Base8 | REX_WIG | Encoding_VEX | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction | INS_FLAGS_IsAvxCommutative) // Packed Multiply High with Round and Scale INST3(pmulhuw, "vpmulhuw", IUM_WR, BAD_CODE, BAD_CODE, PCKDBL(0xE4), 5C, 2X, INS_TT_FULL_MEM, KMask_Base8 | REX_WIG | Encoding_VEX | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction | INS_FLAGS_IsAvxCommutative) // Multiply high the packed 16-bit unsigned integers INST3(pmulhw, "vpmulhw", IUM_WR, BAD_CODE, BAD_CODE, PCKDBL(0xE5), 5C, 2X, INS_TT_FULL_MEM, KMask_Base8 | REX_WIG | Encoding_VEX | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction | INS_FLAGS_IsAvxCommutative) // Multiply high the packed 16-bit signed integers INST3(pmulld, "vpmulld", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x40), 10C, 1C, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0_EVEX | Encoding_VEX | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction | INS_FLAGS_IsAvxCommutative) // Packed multiply 32 bit unsigned integers and store lower 32 bits of each result -INST3(pmuludq, "vpmuludq", IUM_WR, BAD_CODE, BAD_CODE, PCKDBL(0xF4), 5C, 2X, INS_TT_FULL, Input_32Bit | KMask_Base2 | REX_W1_EVEX | Encoding_VEX | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction | INS_FLAGS_IsAvxCommutative) // packed multiply 32-bit unsigned integers and store 64-bit result +INST3(pmuludq, "vpmuludq", IUM_WR, BAD_CODE, BAD_CODE, PCKDBL(0xF4), 5C, 2X, INS_TT_FULL, Input_64Bit | KMask_Base2 | REX_W1_EVEX | Encoding_VEX | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction | INS_FLAGS_IsAvxCommutative) // packed multiply 32-bit unsigned integers and store 64-bit result INST3(pmullw, "vpmullw", IUM_WR, BAD_CODE, BAD_CODE, PCKDBL(0xD5), 5C, 2X, INS_TT_FULL_MEM, KMask_Base8 | REX_WIG | Encoding_VEX | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction | INS_FLAGS_IsAvxCommutative) // Packed multiply 16 bit unsigned integers and store lower 16 bits of each result INST3(pord, "vpor", IUM_WR, BAD_CODE, BAD_CODE, PCKDBL(0xEB), 1C, 3X, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0_EVEX | Encoding_VEX | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction | INS_FLAGS_IsAvxCommutative | INS_FLAGS_HasPseudoName) // Packed bit-wise OR of two xmm regs INST3(prefetchnta, "prefetchnta", IUM_RD, 0x000F0018, BAD_CODE, BAD_CODE, ZERO, 2X, INS_TT_TUPLE1_FIXED, Input_8Bit | REX_WIG | Encoding_REX2) @@ -492,8 +492,8 @@ INST3(sha256msg2, "sha256msg2", IUM_RW, BAD_CODE, BAD_CODE, INST3(sha256rnds2, "sha256rnds2", IUM_RW, BAD_CODE, BAD_CODE, SSE38(0xCB), 6C, 1C, INS_TT_FULL_MEM, REX_WIG) // Perform Two Rounds of SHA256 Operation // Instructions for GFNI -INST3(gf2p8affineinvqb, "vgf2p8affineinvqb",IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0xCF), 5C, 2X, INS_TT_FULL, Input_64Bit | KMask_Base2 | REX_WX | Encoding_VEX | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Galois Field Affine Transformation Inverse -INST3(gf2p8affineqb, "vgf2p8affineqb", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0xCE), 5C, 2X, INS_TT_FULL, Input_64Bit | KMask_Base2 | REX_WX | Encoding_VEX | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Galois Field Affine Transformation +INST3(gf2p8affineinvqb, "vgf2p8affineinvqb",IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0xCF), 5C, 2X, INS_TT_FULL, Input_64Bit | KMask_Base16 | REX_WX | Encoding_VEX | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Galois Field Affine Transformation Inverse +INST3(gf2p8affineqb, "vgf2p8affineqb", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0xCE), 5C, 2X, INS_TT_FULL, Input_64Bit | KMask_Base16 | REX_WX | Encoding_VEX | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Galois Field Affine Transformation INST3(gf2p8mulb, "vgf2p8mulb", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0xCF), 5C, 2X, INS_TT_FULL_MEM, KMask_Base16 | REX_W0 | Encoding_VEX | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Galois Field Multiply Bytes #define LAST_SSE_INSTRUCTION INS_gf2p8mulb @@ -659,8 +659,8 @@ INST3(vpdpbuuds, "vpdpbuuds", IUM_WR, BAD_CODE, BAD_ // Instructions for AVX512-BMM #define FIRST_AVX512BMM_INSTRUCTION INS_vbmacor16x16x16 -INST3(vbmacor16x16x16, "vbmacor16x16x16", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x06, 0x80), 1C, 1C, INS_TT_FULL_MEM, Input_16Bit | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // 16x16 non-transposed fused BMM-accumulate (BMAC) with OR reduction. -INST3(vbmacxor16x16x16, "vbmacxor16x16x16", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x06, 0x80), 1C, 1C, INS_TT_FULL_MEM, Input_16Bit | REX_W1 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // 16x16 non-transposed fused BMM-accumulate (BMAC) with XOR reduction. +INST3(vbmacor16x16x16, "vbmacor16x16x16", IUM_RW, BAD_CODE, BAD_CODE, PCKFLTMAP(0x06, 0x80), 1C, 1C, INS_TT_FULL_MEM, Input_16Bit | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // 16x16 non-transposed fused BMM-accumulate (BMAC) with OR reduction. +INST3(vbmacxor16x16x16, "vbmacxor16x16x16", IUM_RW, BAD_CODE, BAD_CODE, PCKFLTMAP(0x06, 0x80), 1C, 1C, INS_TT_FULL_MEM, Input_16Bit | REX_W1 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // 16x16 non-transposed fused BMM-accumulate (BMAC) with XOR reduction. INST3(vbitrev, "vbitrev", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x06, 0x81), 1C, 1C, INS_TT_FULL_MEM, Input_8Bit | KMask_Base16 | REX_W0 | Encoding_EVEX ) // Bit reversal within a byte boundary. #define LAST_AVX512BMM_INSTRUCTION INS_vbitrev @@ -965,7 +965,7 @@ INST3(vshufi64x2, "vshufi64x2", IUM_WR, BAD_CODE, BAD_ INST3(vpermb, "vpermb", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x8D), 3C, 1C, INS_TT_FULL_MEM, KMask_Base16 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Permute Packed Byte Elements INST3(vpermi2b, "vpermi2b", IUM_RW, BAD_CODE, BAD_CODE, SSE38(0x75), 5C, 2C, INS_TT_FULL_MEM, KMask_Base16 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Full Permute of Bytes from Two Tables Overwriting the Index INST3(vpermt2b, "vpermt2b", IUM_RW, BAD_CODE, BAD_CODE, SSE38(0x7D), 5C, 2C, INS_TT_FULL_MEM, KMask_Base16 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Full Permute of Bytes from Two Tables Overwriting one Table -INST3(vpmultishiftqb, "vpmultishiftqb", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x83), 3C, 1C, INS_TT_FULL, Input_64Bit | KMask_Base2 | REX_W1 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Select Packed Unaligned Bytes From Quadword Sources +INST3(vpmultishiftqb, "vpmultishiftqb", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x83), 3C, 1C, INS_TT_FULL, Input_64Bit | KMask_Base16 | REX_W1 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Select Packed Unaligned Bytes From Quadword Sources // Instructions for AVX512-BITALG, AVX512-VBMI2, AVX512-VPOPCNTDQ INST3(vpcompressb, "vpcompressb", IUM_WR, SSE38(0x63), BAD_CODE, BAD_CODE, 6C, 2C, INS_TT_FULL_MEM, Input_8Bit | REX_W0 | Encoding_EVEX) // Store sparse packed bytes into dense memory @@ -976,38 +976,38 @@ INST3(vpopcntb, "vpopcntb", IUM_WR, BAD_CODE, BAD_ INST3(vpopcntd, "vpopcntd", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x55), 3C, 1C, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Return the Count of Number of Bits Set to 1 in DWORD INST3(vpopcntq, "vpopcntq", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x55), 3C, 1C, INS_TT_FULL, Input_64Bit | KMask_Base2 | REX_W1 | Encoding_EVEX) // Return the Count of Number of Bits Set to 1 in QWORD INST3(vpopcntw, "vpopcntw", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x54), 3C, 1C, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W1 | Encoding_EVEX) // Return the Count of Number of Bits Set to 1 in WORD -INST3(vpshldd, "vpshldd", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0x71), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Concatenate and Shift Packed Data Left Logical -INST3(vpshldq, "vpshldq", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0x71), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_64Bit | KMask_Base2 | REX_W1 | Encoding_EVEX) // Concatenate and Shift Packed Data Left Logical -INST3(vpshldvd, "vpshldvd", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x71), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Concatenate and Variable Shift Packed Data Left Logical -INST3(vpshldvq, "vpshldvq", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x71), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_64Bit | KMask_Base2 | REX_W1 | Encoding_EVEX) // Concatenate and Variable Shift Packed Data Left Logical -INST3(vpshldvw, "vpshldvw", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x70), ILLEGAL, ILLEGAL, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W1 | Encoding_EVEX) // Concatenate and Variable Shift Packed Data Left Logical -INST3(vpshldw, "vpshldw", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0x70), ILLEGAL, ILLEGAL, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W1 | Encoding_EVEX) // Concatenate and Shift Packed Data Left Logical -INST3(vpshrdd, "vpshrdd", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0x73), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Concatenate and Shift Packed Data Right Logical -INST3(vpshrdq, "vpshrdq", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0x73), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_64Bit | KMask_Base2 | REX_W1 | Encoding_EVEX) // Concatenate and Shift Packed Data Right Logical -INST3(vpshrdvd, "vpshrdvd", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x73), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Concatenate and Variable Shift Packed Data Right Logical -INST3(vpshrdvq, "vpshrdvq", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x73), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_64Bit | KMask_Base2 | REX_W1 | Encoding_EVEX) // Concatenate and Variable Shift Packed Data Right Logical -INST3(vpshrdvw, "vpshrdvw", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x72), ILLEGAL, ILLEGAL, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W1 | Encoding_EVEX) // Concatenate and Variable Shift Packed Data Right Logical -INST3(vpshrdw, "vpshrdw", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0x72), ILLEGAL, ILLEGAL, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W1 | Encoding_EVEX) // Concatenate and Shift Packed Data Right Logical -INST3(vpshufbitqmb, "vpshufbitqmb", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x8F), 6C, 1C, INS_TT_FULL_MEM, Input_8Bit | KMask_Base16 | REX_W0 | Encoding_EVEX) // Shuffle Bits From Quadword Elements Using Byte Indexes Into Mask +INST3(vpshldd, "vpshldd", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0x71), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Concatenate and Shift Packed Data Left Logical +INST3(vpshldq, "vpshldq", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0x71), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_64Bit | KMask_Base2 | REX_W1 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Concatenate and Shift Packed Data Left Logical +INST3(vpshldvd, "vpshldvd", IUM_RW, BAD_CODE, BAD_CODE, SSE38(0x71), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Concatenate and Variable Shift Packed Data Left Logical +INST3(vpshldvq, "vpshldvq", IUM_RW, BAD_CODE, BAD_CODE, SSE38(0x71), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_64Bit | KMask_Base2 | REX_W1 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Concatenate and Variable Shift Packed Data Left Logical +INST3(vpshldvw, "vpshldvw", IUM_RW, BAD_CODE, BAD_CODE, SSE38(0x70), ILLEGAL, ILLEGAL, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W1 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Concatenate and Variable Shift Packed Data Left Logical +INST3(vpshldw, "vpshldw", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0x70), ILLEGAL, ILLEGAL, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W1 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Concatenate and Shift Packed Data Left Logical +INST3(vpshrdd, "vpshrdd", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0x73), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Concatenate and Shift Packed Data Right Logical +INST3(vpshrdq, "vpshrdq", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0x73), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_64Bit | KMask_Base2 | REX_W1 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Concatenate and Shift Packed Data Right Logical +INST3(vpshrdvd, "vpshrdvd", IUM_RW, BAD_CODE, BAD_CODE, SSE38(0x73), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Concatenate and Variable Shift Packed Data Right Logical +INST3(vpshrdvq, "vpshrdvq", IUM_RW, BAD_CODE, BAD_CODE, SSE38(0x73), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_64Bit | KMask_Base2 | REX_W1 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Concatenate and Variable Shift Packed Data Right Logical +INST3(vpshrdvw, "vpshrdvw", IUM_RW, BAD_CODE, BAD_CODE, SSE38(0x72), ILLEGAL, ILLEGAL, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W1 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Concatenate and Variable Shift Packed Data Right Logical +INST3(vpshrdw, "vpshrdw", IUM_WR, BAD_CODE, BAD_CODE, SSE3A(0x72), ILLEGAL, ILLEGAL, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W1 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Concatenate and Shift Packed Data Right Logical +INST3(vpshufbitqmb, "vpshufbitqmb", IUM_WR, BAD_CODE, BAD_CODE, SSE38(0x8F), 6C, 1C, INS_TT_FULL_MEM, Input_8Bit | KMask_Base16 | REX_W0 | Encoding_EVEX | INS_FLAGS_Is3OperandInstructionMask) // Shuffle Bits From Quadword Elements Using Byte Indexes Into Mask // Instructions for AVX512-BF16, AVX512-FP16 -INST3(vaddph, "vaddph", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x58), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Add Packed FP16 Values +INST3(vaddph, "vaddph", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x58), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction | INS_FLAGS_IsAvxCommutative) // Add Packed FP16 Values INST3(vaddsh, "vaddsh", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x05, 0x58), 4C, 2X, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Add Scalar FP16 Values -INST3(vcmpph, "vcmpph", IUM_WR, BAD_CODE, BAD_CODE, PSSE3A(0x00, 0xC2), 3C, 1C, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Compare Packed FP16 Values -INST3(vcmpsh, "vcmpsh", IUM_WR, BAD_CODE, BAD_CODE, PSSE3A(0xF3, 0xC2), 3C, 1C, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX) // Compare Scalar FP16 Values +INST3(vcmpph, "vcmpph", IUM_WR, BAD_CODE, BAD_CODE, PSSE3A(0x00, 0xC2), 3C, 1C, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_Is3OperandInstructionMask | INS_FLAGS_HasPseudoName) // Compare Packed FP16 Values +INST3(vcmpsh, "vcmpsh", IUM_WR, BAD_CODE, BAD_CODE, PSSE3A(0xF3, 0xC2), 3C, 1C, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_Is3OperandInstructionMask | INS_FLAGS_HasPseudoName) // Compare Scalar FP16 Values INST3(vcomish, "vcomish", IUM_RD, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x2F), 3C, 1C, INS_TT_TUPLE1_SCALAR, Input_16Bit | REX_W0 | Encoding_EVEX) // Compare Scalar Ordered FP16 Values and Set EFLAGS INST3(vcvtdq2ph, "vcvtdq2ph", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x5B), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Convert Packed Signed DWORD Integers to Packed FP16 Values -INST3(vcvtne2ps2bf16, "vcvtne2ps2bf16", IUM_WR, BAD_CODE, BAD_CODE, PSSE38(0xF2, 0x72), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_32Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Convert Two Packed Single Data to One Packed BF16 Data +INST3(vcvtne2ps2bf16, "vcvtne2ps2bf16", IUM_WR, BAD_CODE, BAD_CODE, PSSE38(0xF2, 0x72), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_32Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Convert Two Packed Single Data to One Packed BF16 Data INST3(vcvtneps2bf16, "vcvtneps2bf16", IUM_WR, BAD_CODE, BAD_CODE, PSSE38(0xF3, 0x72), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_32Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Convert Two Packed Single Data to One Packed BF16 Data INST3(vcvtpd2ph, "vcvtpd2ph", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x05, 0x5A), 8C, 1C, INS_TT_FULL, Input_64Bit | KMask_Base2 | REX_W1 | Encoding_EVEX) // Convert Packed Double Precision FP Values to Packed FP16 Values -INST3(vcvtph2dq, "vcvtph2dq", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x05, 0x5B), ILLEGAL, ILLEGAL, INS_TT_HALF_MEM, Input_16Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Convert Packed FP16 Values to Packed Signed DWORD Integers -INST3(vcvtph2pd, "vcvtph2pd", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x5A), 15C, 2C, INS_TT_QUARTER_MEM, Input_16Bit | KMask_Base2 | REX_W0 | Encoding_EVEX) // Convert Packed FP16 Values to Packed Double Precision FP Values -INST3(vcvtph2psx, "vcvtph2psx", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x13), ILLEGAL, ILLEGAL, INS_TT_HALF_MEM, Input_16Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Convert Packed FP16 Values to Packed Single Precision FP Values -INST3(vcvtph2qq, "vcvtph2qq", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x05, 0x7B), ILLEGAL, ILLEGAL, INS_TT_QUARTER_MEM, Input_16Bit | KMask_Base2 | REX_W0 | Encoding_EVEX) // Convert Packed FP16 Values to Packed Signed QWORD Integers -INST3(vcvtph2udq, "vcvtph2udq", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x79), 8C, 1C, INS_TT_HALF_MEM, Input_16Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Convert Packed FP16 Values to Packed Unsigned DWORD Integers -INST3(vcvtph2uqq, "vcvtph2uqq", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x05, 0x79), ILLEGAL, ILLEGAL, INS_TT_QUARTER_MEM, Input_16Bit | KMask_Base2 | REX_W0 | Encoding_EVEX) // Convert Packed FP16 Values to Packed Unsigned QWORD Integers -INST3(vcvtph2uw, "vcvtph2uw", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x7D), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Convert Packed FP16 Values to Packed Unsigned WORD Integers -INST3(vcvtph2w, "vcvtph2w", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x05, 0x7D), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Convert Packed FP16 Values to Packed Signed WORD Integers +INST3(vcvtph2dq, "vcvtph2dq", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x05, 0x5B), ILLEGAL, ILLEGAL, INS_TT_HALF, Input_16Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Convert Packed FP16 Values to Packed Signed DWORD Integers +INST3(vcvtph2pd, "vcvtph2pd", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x5A), 15C, 2C, INS_TT_QUARTER, Input_16Bit | KMask_Base2 | REX_W0 | Encoding_EVEX) // Convert Packed FP16 Values to Packed Double Precision FP Values +INST3(vcvtph2psx, "vcvtph2psx", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x13), ILLEGAL, ILLEGAL, INS_TT_HALF, Input_16Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Convert Packed FP16 Values to Packed Single Precision FP Values +INST3(vcvtph2qq, "vcvtph2qq", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x05, 0x7B), ILLEGAL, ILLEGAL, INS_TT_QUARTER, Input_16Bit | KMask_Base2 | REX_W0 | Encoding_EVEX) // Convert Packed FP16 Values to Packed Signed QWORD Integers +INST3(vcvtph2udq, "vcvtph2udq", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x79), 8C, 1C, INS_TT_HALF, Input_16Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Convert Packed FP16 Values to Packed Unsigned DWORD Integers +INST3(vcvtph2uqq, "vcvtph2uqq", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x05, 0x79), ILLEGAL, ILLEGAL, INS_TT_QUARTER, Input_16Bit | KMask_Base2 | REX_W0 | Encoding_EVEX) // Convert Packed FP16 Values to Packed Unsigned QWORD Integers +INST3(vcvtph2uw, "vcvtph2uw", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x7D), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Convert Packed FP16 Values to Packed Unsigned WORD Integers +INST3(vcvtph2w, "vcvtph2w", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x05, 0x7D), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Convert Packed FP16 Values to Packed Signed WORD Integers INST3(vcvtps2phx, "vcvtps2phx", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x05, 0x1D), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Convert Packed Single Precision FP Values to Packed FP16 Values INST3(vcvtqq2ph, "vcvtqq2ph", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x5B), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_64Bit | KMask_Base2 | REX_W1 | Encoding_EVEX) // Convert Packed Signed QWORD Integers to Packed FP16 Values INST3(vcvtsd2sh, "vcvtsd2sh", IUM_WR, BAD_CODE, BAD_CODE, SSEDBLMAP(0x05, 0x5A), 7C, 1C, INS_TT_TUPLE1_SCALAR, Input_64Bit | KMask_Base1 | REX_W1 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Convert Scalar Double Precision FP Value to Scalar FP16 Value @@ -1020,94 +1020,94 @@ INST3(vcvtsh2usi64, "vcvtsh2usi", IUM_WR, BAD_CODE, BAD_ INST3(vcvtsi2sh32, "vcvtsi2sh", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x05, 0x2A), 7C, 1C, INS_TT_TUPLE1_SCALAR, Input_32Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Convert Scalar Signed DWORD Integer to Scalar FP16 Value INST3(vcvtsi2sh64, "vcvtsi2sh", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x05, 0x2A), 7C, 1C, INS_TT_TUPLE1_SCALAR, Input_64Bit | KMask_Base1 | REX_W1 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Convert Scalar Signed QWORD Integer to Scalar FP16 Value INST3(vcvtss2sh, "vcvtss2sh", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x1D), 4C, 1C, INS_TT_TUPLE1_SCALAR, Input_32Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Convert Scalar Single Precision FP Value to Scalar FP16 Value -INST3(vcvttph2dq, "vcvttph2dq", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x05, 0x5B), 8C, 1C, INS_TT_HALF_MEM, Input_16Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Convert with Truncation Packed FP16 Values to Packed Signed DWORD Integers -INST3(vcvttph2qq, "vcvttph2qq", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x05, 0x7A), ILLEGAL, ILLEGAL, INS_TT_QUARTER_MEM, Input_16Bit | KMask_Base2 | REX_W0 | Encoding_EVEX) // Convert with Truncation Packed FP16 Values to Packed Signed QWORD Integers -INST3(vcvttph2udq, "vcvttph2udq", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x78), 8C, 1C, INS_TT_HALF_MEM, Input_16Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Convert with Truncation Packed FP16 Values to Packed Unsigned DWORD Integers -INST3(vcvttph2uqq, "vcvttph2uqq", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x05, 0x78), ILLEGAL, ILLEGAL, INS_TT_QUARTER_MEM, Input_16Bit | KMask_Base2 | REX_W0 | Encoding_EVEX) // Convert with Truncation Packed FP16 Values to Packed Unsigned QWORD Integers -INST3(vcvttph2uw, "vcvttph2uw", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x7C), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Convert with Truncation Packed FP16 Values to Packed Unsigned WORD Integers -INST3(vcvttph2w, "vcvttph2w", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x05, 0x7C), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Convert with Truncation Packed FP16 Values to Packed Signed WORD Integers +INST3(vcvttph2dq, "vcvttph2dq", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x05, 0x5B), 8C, 1C, INS_TT_HALF, Input_16Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Convert with Truncation Packed FP16 Values to Packed Signed DWORD Integers +INST3(vcvttph2qq, "vcvttph2qq", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x05, 0x7A), ILLEGAL, ILLEGAL, INS_TT_QUARTER, Input_16Bit | KMask_Base2 | REX_W0 | Encoding_EVEX) // Convert with Truncation Packed FP16 Values to Packed Signed QWORD Integers +INST3(vcvttph2udq, "vcvttph2udq", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x78), 8C, 1C, INS_TT_HALF, Input_16Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Convert with Truncation Packed FP16 Values to Packed Unsigned DWORD Integers +INST3(vcvttph2uqq, "vcvttph2uqq", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x05, 0x78), ILLEGAL, ILLEGAL, INS_TT_QUARTER, Input_16Bit | KMask_Base2 | REX_W0 | Encoding_EVEX) // Convert with Truncation Packed FP16 Values to Packed Unsigned QWORD Integers +INST3(vcvttph2uw, "vcvttph2uw", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x7C), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Convert with Truncation Packed FP16 Values to Packed Unsigned WORD Integers +INST3(vcvttph2w, "vcvttph2w", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x05, 0x7C), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Convert with Truncation Packed FP16 Values to Packed Signed WORD Integers INST3(vcvttsh2si32, "vcvttsh2si", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x05, 0x2C), 8C, 1C, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX) // Convert with Truncation Scalar FP16 Value to Scalar Signed DWORD Integer INST3(vcvttsh2si64, "vcvttsh2si", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x05, 0x2C), 8C, 1C, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W1 | Encoding_EVEX) // Convert with Truncation Scalar FP16 Value to Scalar Signed QWORD Integer INST3(vcvttsh2usi32, "vcvttsh2usi", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x05, 0x78), 8C, 1C, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX) // Convert with Truncation Scalar FP16 Value to Scalar Unsigned DWORD Integer INST3(vcvttsh2usi64, "vcvttsh2usi", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x05, 0x78), 8C, 1C, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W1 | Encoding_EVEX) // Convert with Truncation Scalar FP16 Value to Scalar Unsigned QWORD Integer -INST3(vcvtudq2ph, "vcvtudq2ph", IUM_WR, BAD_CODE, BAD_CODE, SSEDBLMAP(0x05, 0x7A), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Convert Packed Single Precision FP Values to Packed FP16 Values -INST3(vcvtuqq2ph, "vcvtuqq2ph", IUM_WR, BAD_CODE, BAD_CODE, SSEDBLMAP(0x05, 0x7A), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_64Bit | KMask_Base2 | REX_W1 | Encoding_EVEX) // Convert Packed Single Precision FP Values to Packed FP16 Values +INST3(vcvtudq2ph, "vcvtudq2ph", IUM_WR, BAD_CODE, BAD_CODE, SSEDBLMAP(0x05, 0x7A), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Convert Packed Unsigned DWORD Integers to Packed FP16 Values +INST3(vcvtuqq2ph, "vcvtuqq2ph", IUM_WR, BAD_CODE, BAD_CODE, SSEDBLMAP(0x05, 0x7A), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_64Bit | KMask_Base2 | REX_W1 | Encoding_EVEX) // Convert Packed Unsigned QWORD Integers to Packed FP16 Values INST3(vcvtusi2sh32, "vcvtusi2sh", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x05, 0x7B), 7C, 1C, INS_TT_TUPLE1_SCALAR, Input_32Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Convert Scalar Unsigned DWORD Integer to Scalar FP16 Value INST3(vcvtusi2sh64, "vcvtusi2sh", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x05, 0x7B), 7C, 1C, INS_TT_TUPLE1_SCALAR, Input_64Bit | KMask_Base1 | REX_W1 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Convert Scalar Unsigned QWORD Integer to Scalar FP16 Value -INST3(vcvtuw2ph, "vcvtuw2ph", IUM_WR, BAD_CODE, BAD_CODE, SSEDBLMAP(0x05, 0x7D), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Convert Packed Single Precision FP Values to Packed FP16 Values -INST3(vcvtw2ph, "vcvtw2ph", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x05, 0x7D), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Convert Packed Single Precision FP Values to Packed FP16 Values -INST3(vdivph, "vdivph", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x5E), ILLEGAL, ILLEGAL, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Divide Packed FP16 Values +INST3(vcvtuw2ph, "vcvtuw2ph", IUM_WR, BAD_CODE, BAD_CODE, SSEDBLMAP(0x05, 0x7D), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Convert Packed Unsigned WORD Integers to Packed FP16 Values +INST3(vcvtw2ph, "vcvtw2ph", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x05, 0x7D), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Convert Packed Signed WORD Integers to Packed FP16 Values +INST3(vdivph, "vdivph", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x5E), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Divide Packed FP16 Values INST3(vdivsh, "vdivsh", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x05, 0x5E), ILLEGAL, ILLEGAL, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Divide Scalar FP16 Values -INST3(vdpbf16ps, "vdpbf16ps", IUM_WR, BAD_CODE, BAD_CODE, PSSE38(0xF3, 0x52), 8C, 2C, INS_TT_FULL, Input_16Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Dot Product of BF16 Pairs Accumulated Into Packed Single Precision -INST3(vfcmaddcph, "vfcmaddcph", IUM_RW, BAD_CODE, BAD_CODE, SSEDBLMAP(0x06, 0x56), 8C, 1C, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Complex Multiply and Accumulate Packed FP16 Values -INST3(vfcmaddcsh, "vfcmaddcsh", IUM_RW, BAD_CODE, BAD_CODE, SSEDBLMAP(0x06, 0x57), 8C, 1C, INS_TT_TUPLE1_SCALAR, Input_32Bit | KMask_Base1 | REX_W0 | Encoding_EVEX) // Complex Multiply and Accumulate Scalar FP16 Values -INST3(vfcmulcph, "vfcmulcph", IUM_WR, BAD_CODE, BAD_CODE, SSEDBLMAP(0x06, 0xD6), 8C, 1C, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Complex Multiply Packed FP16 Values -INST3(vfcmulcsh, "vfcmulcsh", IUM_WR, BAD_CODE, BAD_CODE, SSEDBLMAP(0x06, 0xD7), 8C, 1C, INS_TT_TUPLE1_SCALAR, Input_32Bit | KMask_Base1 | REX_W0 | Encoding_EVEX) // Complex Multiply Scalar FP16 Values +INST3(vdpbf16ps, "vdpbf16ps", IUM_RW, BAD_CODE, BAD_CODE, PSSE38(0xF3, 0x52), 8C, 2C, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Dot Product of BF16 Pairs Accumulated Into Packed Single Precision +INST3(vfcmaddcph, "vfcmaddcph", IUM_RW, BAD_CODE, BAD_CODE, SSEDBLMAP(0x06, 0x56), 8C, 1C, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Complex Multiply and Accumulate Packed FP16 Values +INST3(vfcmaddcsh, "vfcmaddcsh", IUM_RW, BAD_CODE, BAD_CODE, SSEDBLMAP(0x06, 0x57), 8C, 1C, INS_TT_TUPLE1_SCALAR, Input_32Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Complex Multiply and Accumulate Scalar FP16 Values +INST3(vfcmulcph, "vfcmulcph", IUM_WR, BAD_CODE, BAD_CODE, SSEDBLMAP(0x06, 0xD6), 8C, 1C, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Complex Multiply Packed FP16 Values +INST3(vfcmulcsh, "vfcmulcsh", IUM_WR, BAD_CODE, BAD_CODE, SSEDBLMAP(0x06, 0xD7), 8C, 1C, INS_TT_TUPLE1_SCALAR, Input_32Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Complex Multiply Scalar FP16 Values // vfmulcph/vfmulcsh are grouped with vfcmulcph/vfcmulcsh rather than sorted alphabetically so that they // stay outside FIRST_AVX10V1_FMA_INSTR..LAST_AVX10V1_FMA_INSTR. They are IUM_WR, not read-modify-write. -INST3(vfmulcph, "vfmulcph", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x06, 0xD6), 8C, 1C, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Complex Multiply Packed FP16 Values -INST3(vfmulcsh, "vfmulcsh", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x06, 0xD7), 8C, 1C, INS_TT_TUPLE1_SCALAR, Input_32Bit | KMask_Base1 | REX_W0 | Encoding_EVEX) // Complex Multiply Scalar FP16 Values +INST3(vfmulcph, "vfmulcph", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x06, 0xD6), 8C, 1C, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Complex Multiply Packed FP16 Values +INST3(vfmulcsh, "vfmulcsh", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x06, 0xD7), 8C, 1C, INS_TT_TUPLE1_SCALAR, Input_32Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Complex Multiply Scalar FP16 Values #define FIRST_AVX10V1_FMA_INSTR INS_vfmadd132ph -INST3(vfmadd132ph, "vfmadd132ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x98), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Add of Packed FP16 Values -INST3(vfmadd213ph, "vfmadd213ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xA8), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Add of Packed FP16 Values -INST3(vfmadd231ph, "vfmadd231ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xB8), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Add of Packed FP16 Values +INST3(vfmadd132ph, "vfmadd132ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x98), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Add of Packed FP16 Values +INST3(vfmadd213ph, "vfmadd213ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xA8), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Add of Packed FP16 Values +INST3(vfmadd231ph, "vfmadd231ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xB8), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Add of Packed FP16 Values INST3(vfmadd132sh, "vfmadd132sh", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x99), 4C, 2X, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Add of Scalar FP16 Values INST3(vfmadd213sh, "vfmadd213sh", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xA9), 4C, 2X, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Add of Scalar FP16 Values INST3(vfmadd231sh, "vfmadd231sh", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xB9), 4C, 2X, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Add of Scalar FP16 Values -INST3(vfmaddcph, "vfmaddcph", IUM_RW, BAD_CODE, BAD_CODE, SSEFLTMAP(0x06, 0x56), 8C, 1C, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // Complex Multiply and Accumulate Packed FP16 Values -INST3(vfmaddcsh, "vfmaddcsh", IUM_RW, BAD_CODE, BAD_CODE, SSEFLTMAP(0x06, 0x57), 8C, 1C, INS_TT_TUPLE1_SCALAR, Input_32Bit | KMask_Base1 | REX_W0 | Encoding_EVEX) // Complex Multiply and Accumulate Scalar FP16 Values -INST3(vfmaddsub132ph, "vfmaddsub132ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x96), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Alternating Add/Subtract of Packed FP16 Values -INST3(vfmaddsub213ph, "vfmaddsub213ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xA6), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Alternating Add/Subtract of Packed FP16 Values -INST3(vfmaddsub231ph, "vfmaddsub231ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xB6), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Alternating Add/Subtract of Packed FP16 Values -INST3(vfmsub132ph, "vfmsub132ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x9A), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Subtract of Packed FP16 Values -INST3(vfmsub213ph, "vfmsub213ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xAA), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Subtract of Packed FP16 Values -INST3(vfmsub231ph, "vfmsub231ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xBA), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Subtract of Packed FP16 Values +INST3(vfmaddcph, "vfmaddcph", IUM_RW, BAD_CODE, BAD_CODE, SSEFLTMAP(0x06, 0x56), 8C, 1C, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Complex Multiply and Accumulate Packed FP16 Values +INST3(vfmaddcsh, "vfmaddcsh", IUM_RW, BAD_CODE, BAD_CODE, SSEFLTMAP(0x06, 0x57), 8C, 1C, INS_TT_TUPLE1_SCALAR, Input_32Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Complex Multiply and Accumulate Scalar FP16 Values +INST3(vfmaddsub132ph, "vfmaddsub132ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x96), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Alternating Add/Subtract of Packed FP16 Values +INST3(vfmaddsub213ph, "vfmaddsub213ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xA6), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Alternating Add/Subtract of Packed FP16 Values +INST3(vfmaddsub231ph, "vfmaddsub231ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xB6), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Alternating Add/Subtract of Packed FP16 Values +INST3(vfmsub132ph, "vfmsub132ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x9A), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Subtract of Packed FP16 Values +INST3(vfmsub213ph, "vfmsub213ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xAA), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Subtract of Packed FP16 Values +INST3(vfmsub231ph, "vfmsub231ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xBA), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Subtract of Packed FP16 Values INST3(vfmsub132sh, "vfmsub132sh", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x9B), 4C, 2X, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Subtract of Scalar FP16 Values INST3(vfmsub213sh, "vfmsub213sh", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xAB), 4C, 2X, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Subtract of Scalar FP16 Values INST3(vfmsub231sh, "vfmsub231sh", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xBB), 4C, 2X, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Subtract of Scalar FP16 Values -INST3(vfmsubadd132ph, "vfmsubadd132ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x97), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Alternating Subtract/Add of Packed FP16 Values -INST3(vfmsubadd213ph, "vfmsubadd213ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xA7), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Alternating Subtract/Add of Packed FP16 Values -INST3(vfmsubadd231ph, "vfmsubadd231ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xB7), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Alternating Subtract/Add of Packed FP16 Values -INST3(vfnmadd132ph, "vfnmadd132ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x9C), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Negative Multiply-Add of Packed FP16 Values -INST3(vfnmadd213ph, "vfnmadd213ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xAC), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Negative Multiply-Add of Packed FP16 Values -INST3(vfnmadd231ph, "vfnmadd231ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xBC), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Negative Multiply-Add of Packed FP16 Values +INST3(vfmsubadd132ph, "vfmsubadd132ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x97), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Alternating Subtract/Add of Packed FP16 Values +INST3(vfmsubadd213ph, "vfmsubadd213ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xA7), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Alternating Subtract/Add of Packed FP16 Values +INST3(vfmsubadd231ph, "vfmsubadd231ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xB7), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Multiply-Alternating Subtract/Add of Packed FP16 Values +INST3(vfnmadd132ph, "vfnmadd132ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x9C), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Negative Multiply-Add of Packed FP16 Values +INST3(vfnmadd213ph, "vfnmadd213ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xAC), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Negative Multiply-Add of Packed FP16 Values +INST3(vfnmadd231ph, "vfnmadd231ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xBC), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Negative Multiply-Add of Packed FP16 Values INST3(vfnmadd132sh, "vfnmadd132sh", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x9D), 4C, 2X, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Negative Multiply-Add of Scalar FP16 Values INST3(vfnmadd213sh, "vfnmadd213sh", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xAD), 4C, 2X, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Negative Multiply-Add of Scalar FP16 Values INST3(vfnmadd231sh, "vfnmadd231sh", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xBD), 4C, 2X, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Negative Multiply-Add of Scalar FP16 Values -INST3(vfnmsub132ph, "vfnmsub132ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x9E), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Negative Multiply-Subtract of Packed FP16 Values -INST3(vfnmsub213ph, "vfnmsub213ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xAE), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Negative Multiply-Subtract of Packed FP16 Values -INST3(vfnmsub231ph, "vfnmsub231ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xBE), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Negative Multiply-Subtract of Packed FP16 Values +INST3(vfnmsub132ph, "vfnmsub132ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x9E), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Negative Multiply-Subtract of Packed FP16 Values +INST3(vfnmsub213ph, "vfnmsub213ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xAE), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Negative Multiply-Subtract of Packed FP16 Values +INST3(vfnmsub231ph, "vfnmsub231ph", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xBE), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Negative Multiply-Subtract of Packed FP16 Values INST3(vfnmsub132sh, "vfnmsub132sh", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x9F), 4C, 2X, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Negative Multiply-Subtract of Scalar FP16 Values INST3(vfnmsub213sh, "vfnmsub213sh", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xAF), 4C, 2X, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Negative Multiply-Subtract of Scalar FP16 Values INST3(vfnmsub231sh, "vfnmsub231sh", IUM_RW, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0xBF), 4C, 2X, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Fused Negative Multiply-Subtract of Scalar FP16 Values #define LAST_AVX10V1_FMA_INSTR INS_vfnmsub231sh -INST3(vfpclassph, "vfpclassph", IUM_WR, BAD_CODE, BAD_CODE, PSSE3A(0x00, 0x66), 3C, 1C, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Test Types of Packed FP16 Values +INST3(vfpclassph, "vfpclassph", IUM_WR, BAD_CODE, BAD_CODE, PSSE3A(0x00, 0x66), 3C, 1C, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Test Types of Packed FP16 Values INST3(vfpclasssh, "vfpclasssh", IUM_WR, BAD_CODE, BAD_CODE, PSSE3A(0x00, 0x67), 3C, 1C, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX) // Test Types of Scalar FP16 Values -INST3(vgetexpph, "vgetexpph", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x42), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Convert Exponents of Packed FP16 Values to FP16 Values -INST3(vgetexpsh, "vgetexpsh", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x43), 4C, 2X, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX) // Convert Exponents of Scalar FP16 Values to FP16 Values -INST3(vgetmantph, "vgetmantph", IUM_WR, BAD_CODE, BAD_CODE, PSSE3A(0x00, 0x26), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Extract Normalized Mantissas from Packed FP16 Values -INST3(vgetmantsh, "vgetmantsh", IUM_WR, BAD_CODE, BAD_CODE, PSSE3A(0x00, 0x27), 4C, 2X, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX) // Extract Normalized Mantissas from Scalar FP16 Values -INST3(vmaxph, "vmaxph", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x5F), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Return Maximum of Packed FP16 Values +INST3(vgetexpph, "vgetexpph", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x42), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Convert Exponents of Packed FP16 Values to FP16 Values +INST3(vgetexpsh, "vgetexpsh", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x43), 4C, 2X, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Convert Exponents of Scalar FP16 Values to FP16 Values +INST3(vgetmantph, "vgetmantph", IUM_WR, BAD_CODE, BAD_CODE, PSSE3A(0x00, 0x26), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Extract Normalized Mantissas from Packed FP16 Values +INST3(vgetmantsh, "vgetmantsh", IUM_WR, BAD_CODE, BAD_CODE, PSSE3A(0x00, 0x27), 4C, 2X, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Extract Normalized Mantissas from Scalar FP16 Values +INST3(vmaxph, "vmaxph", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x5F), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Return Maximum of Packed FP16 Values INST3(vmaxsh, "vmaxsh", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x05, 0x5F), 4C, 2X, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Return Maximum of Scalar FP16 Values INST3(vminsh, "vminsh", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x05, 0x5D), 4C, 2X, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Return Minimum of Scalar FP16 Values -INST3(vminph, "vminph", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x5D), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Return Minimum of Packed FP16 Values +INST3(vminph, "vminph", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x5D), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Return Minimum of Packed FP16 Values INST3(vmovsh, "vmovsh", IUM_WR, SSEFLTMAP(0x05, 0x11), BAD_CODE, SSEFLTMAP(0x05, 0x10), ILLEGAL, ILLEGAL, INS_TT_TUPLE1_SCALAR, Input_16Bit | REX_W0 | Encoding_EVEX) // Move Scalar FP16 Value INST3(vmovw, "vmovw", IUM_WR, PCKDBLMAP(0x06, 0x7E), BAD_CODE, PCKDBLMAP(0x00, 0x6E), ILLEGAL, ILLEGAL, INS_TT_TUPLE1_SCALAR, Input_16Bit | REX_WIG | Encoding_EVEX) // Move Word -INST3(vmulph, "vmulph", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x59), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Multiply Packed FP16 Values +INST3(vmulph, "vmulph", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x59), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction | INS_FLAGS_IsAvxCommutative) // Multiply Packed FP16 Values INST3(vmulsh, "vmulsh", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x05, 0x59), 4C, 2X, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Multiply Scalar FP16 Values -INST3(vrcpph, "vrcpph", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x4C), ILLEGAL, ILLEGAL, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Compute REciprocals of Packed FP16 Values +INST3(vrcpph, "vrcpph", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x4C), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Compute REciprocals of Packed FP16 Values INST3(vrcpsh, "vrcpsh", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x4D), 4C, 1C, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Compute REciprocals of Scalar FP16 Values -INST3(vreduceph, "vreduceph", IUM_WR, BAD_CODE, BAD_CODE, PSSE3A(0x00, 0x56), 12C, 2C, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Perform Reduction Transformation on Packed FP16 Values -INST3(vreducesh, "vreducesh", IUM_WR, BAD_CODE, BAD_CODE, PSSE3A(0x00, 0x57), 12C, 2C, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX) // Perform Reduction Transformation on Scalar FP16 Values -INST3(vrndscaleph, "vrndscaleph", IUM_WR, BAD_CODE, BAD_CODE, PSSE3A(0x00, 0x08), 8C, 1C, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Round Packed FP16 Values to Include a Given Number of Fraction Bits +INST3(vreduceph, "vreduceph", IUM_WR, BAD_CODE, BAD_CODE, PSSE3A(0x00, 0x56), 12C, 2C, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Perform Reduction Transformation on Packed FP16 Values +INST3(vreducesh, "vreducesh", IUM_WR, BAD_CODE, BAD_CODE, PSSE3A(0x00, 0x57), 12C, 2C, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Perform Reduction Transformation on Scalar FP16 Values +INST3(vrndscaleph, "vrndscaleph", IUM_WR, BAD_CODE, BAD_CODE, PSSE3A(0x00, 0x08), 8C, 1C, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Round Packed FP16 Values to Include a Given Number of Fraction Bits INST3(vrndscalesh, "vrndscalesh", IUM_WR, BAD_CODE, BAD_CODE, PSSE3A(0x00, 0x0A), 8C, 1C, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Round Scalar FP16 Values to Include a Given Number of Fraction Bits -INST3(vrsqrtph, "vrsqrtph", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x4E), ILLEGAL, ILLEGAL, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Compute REciprocals of Square Roots of Packed FP16 Values +INST3(vrsqrtph, "vrsqrtph", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x4E), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Compute REciprocals of Square Roots of Packed FP16 Values INST3(vrsqrtsh, "vrsqrtsh", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x4F), 5C, 1C, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Compute REciprocals of Square Roots of Scalar FP16 Values -INST3(vscalefph, "vscalefph", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x2C), 8C, 1C, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Scale Packed FP16 Values with FP16 Values -INST3(vscalefsh, "vscalefsh", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x2D), 8C, 1C, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX) // Scale Scalar FP16 Values with FP16 Values -INST3(vsqrtph, "vsqrtph", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x51), ILLEGAL, ILLEGAL, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Compute Square Root of Packed FP16 Values +INST3(vscalefph, "vscalefph", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x2C), 8C, 1C, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Scale Packed FP16 Values with FP16 Values +INST3(vscalefsh, "vscalefsh", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x06, 0x2D), 8C, 1C, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Scale Scalar FP16 Values with FP16 Values +INST3(vsqrtph, "vsqrtph", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x51), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Compute Square Root of Packed FP16 Values INST3(vsqrtsh, "vsqrtsh", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x05, 0x51), 15C, 1C, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Compute Square Root of Scalar FP16 Values -INST3(vsubph, "vsubph", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x5C), 4C, 2X, INS_TT_FULL_MEM, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX) // Subtract Packed FP16 Values +INST3(vsubph, "vsubph", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x5C), 4C, 2X, INS_TT_FULL, Input_16Bit | KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Subtract Packed FP16 Values INST3(vsubsh, "vsubsh", IUM_WR, BAD_CODE, BAD_CODE, SSEFLTMAP(0x05, 0x5C), 4C, 2X, INS_TT_TUPLE1_SCALAR, Input_16Bit | KMask_Base1 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstSrcSrcAVXInstruction) // Subtract Scalar FP16 Values INST3(vucomish, "vucomish", IUM_RD, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x2E), 3C, 1C, INS_TT_TUPLE1_SCALAR, Input_16Bit | REX_W0 | Encoding_EVEX) // Compare Scalar Unordered FP16 Values and Set EFLAGS @@ -1116,8 +1116,8 @@ INST3(vp2intersectd, "vp2intersectd", IUM_WR, BAD_CODE, BAD_ INST3(vp2intersectq, "vp2intersectq", IUM_WR, BAD_CODE, BAD_CODE, PSSE38(0xF2, 0x68), ILLEGAL, ILLEGAL, INS_TT_FULL, Input_64Bit | KMask_Base2 | REX_W1 | Encoding_EVEX) // Compute Intersection Between QWORDS to a Pair of Mask Registers // Instructions for AVX10v2 -INST3(vcomxsd, "vcomxsd", IUM_RD, BAD_CODE, BAD_CODE, SSEFLT(0x2f), 3C, 1C, INS_TT_TUPLE1_SCALAR, Input_64Bit | REX_W1 | Encoding_EVEX | Writes_OF | Writes_SF | Writes_ZF | Writes_PF | Writes_CF | Resets_AF) // Compare double precision floating point values and set flags -INST3(vcomxss, "vcomxss", IUM_RD, BAD_CODE, BAD_CODE, SSEDBL(0x2f), 3C, 1C, INS_TT_TUPLE1_SCALAR, Input_32Bit | REX_W0 | Encoding_EVEX | Writes_OF | Writes_SF | Writes_ZF | Writes_PF | Writes_CF | Resets_AF) // Compare single precision floating point values and set flags +INST3(vcomxsd, "vcomxsd", IUM_RD, BAD_CODE, BAD_CODE, SSEDBL(0x2f), 3C, 1C, INS_TT_TUPLE1_SCALAR, Input_64Bit | REX_W1 | Encoding_EVEX | Writes_OF | Writes_SF | Writes_ZF | Writes_PF | Writes_CF | Resets_AF) // Compare double precision floating point values and set flags +INST3(vcomxss, "vcomxss", IUM_RD, BAD_CODE, BAD_CODE, SSEFLT(0x2f), 3C, 1C, INS_TT_TUPLE1_SCALAR, Input_32Bit | REX_W0 | Encoding_EVEX | Writes_OF | Writes_SF | Writes_ZF | Writes_PF | Writes_CF | Resets_AF) // Compare single precision floating point values and set flags INST3(vcvtps2ibs, "vcvtps2ibs", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x05, 0x69), 7C, 1C, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) INST3(vcvtps2iubs, "vcvtps2iubs", IUM_WR, BAD_CODE, BAD_CODE, PCKDBLMAP(0x05, 0x6B), 7C, 1C, INS_TT_FULL, Input_32Bit | KMask_Base4 | REX_W0 | Encoding_EVEX) // cvt with truncation/saturation scalar single to unsigned DWORD/QWORD INST3(vcvttpd2dqs, "vcvttpd2dqs", IUM_WR, BAD_CODE, BAD_CODE, PCKFLTMAP(0x05, 0x6D), 7C, 1C, INS_TT_FULL, Input_64Bit | KMask_Base2 | REX_W1 | Encoding_EVEX) // cvt with truncation/saturation packed doubles to DWORDs @@ -1145,8 +1145,8 @@ INST3(vminmaxss, "vminmaxss", IUM_WR, BAD_CODE, BAD_ INST3(vmovd_simd, "vmovd", IUM_WR, PCKDBL(0xD6), BAD_CODE, SSEFLT(0x7E), 1C, 1C, INS_TT_TUPLE1_SCALAR, Input_32Bit | REX_W0 | Encoding_EVEX) // Move DWORD between xmm regs <-> memory/xmm regs INST3(vmovw_simd, "vmovw", IUM_WR, SSEFLTMAP(0x05, 0x7E), BAD_CODE, SSEFLTMAP(0x05, 0x6E), 1C, 1C, INS_TT_TUPLE1_SCALAR, Input_16Bit | REX_W0 | Encoding_EVEX) // Move WORD between xmm regs <-> memory/xmm regs INST3(vmpsadbw, "vmpsadbw", IUM_WR, BAD_CODE, BAD_CODE, AVX3A(0x42), 4C, 2C, INS_TT_FULL_MEM, KMask_Base8 | REX_W0 | Encoding_EVEX | INS_FLAGS_IsDstDstSrcAVXInstruction) // Compute Multiple Packed Sums of Absolute Difference -INST3(vucomxsd, "vucomxsd", IUM_RD, BAD_CODE, BAD_CODE, SSEFLT(0x2f), 3C, 1C, INS_TT_TUPLE1_SCALAR, Input_64Bit | REX_W1 | Encoding_EVEX | Writes_OF | Writes_SF | Writes_ZF | Writes_PF | Writes_CF | Resets_AF) // Perform an unordered compare of double precision floating point values and set flags -INST3(vucomxss, "vucomxss", IUM_RD, BAD_CODE, BAD_CODE, SSEDBL(0x2E), 3C, 1C, INS_TT_TUPLE1_SCALAR, Input_32Bit | REX_W0 | Encoding_EVEX | Writes_OF | Writes_SF | Writes_ZF | Writes_PF | Writes_CF | Resets_AF) // Perform an unordered compare of single precision floating point values and set flags +INST3(vucomxsd, "vucomxsd", IUM_RD, BAD_CODE, BAD_CODE, SSEDBL(0x2e), 3C, 1C, INS_TT_TUPLE1_SCALAR, Input_64Bit | REX_W1 | Encoding_EVEX | Writes_OF | Writes_SF | Writes_ZF | Writes_PF | Writes_CF | Resets_AF) // Perform an unordered compare of double precision floating point values and set flags +INST3(vucomxss, "vucomxss", IUM_RD, BAD_CODE, BAD_CODE, SSEFLT(0x2e), 3C, 1C, INS_TT_TUPLE1_SCALAR, Input_32Bit | REX_W0 | Encoding_EVEX | Writes_OF | Writes_SF | Writes_ZF | Writes_PF | Writes_CF | Resets_AF) // Perform an unordered compare of single precision floating point values and set flags #define LAST_AVX512_INSTRUCTION INS_vucomxss diff --git a/src/coreclr/jit/lowerxarch.cpp b/src/coreclr/jit/lowerxarch.cpp index d2e03bbe368706..1b53de3d2745b5 100644 --- a/src/coreclr/jit/lowerxarch.cpp +++ b/src/coreclr/jit/lowerxarch.cpp @@ -7837,12 +7837,14 @@ void Lowering::ContainCheckStoreIndir(GenTreeStoreInd* node) switch (tupleType) { case INS_TT_HALF_MEM: + case INS_TT_HALF: { memSize = simdSize / 2; break; } case INS_TT_QUARTER_MEM: + case INS_TT_QUARTER: { memSize = simdSize / 4; break; @@ -8962,6 +8964,7 @@ bool Lowering::IsContainableHWIntrinsicOp(GenTreeHWIntrinsic* parentNode, GenTre break; } + case INS_TT_QUARTER: case INS_TT_QUARTER_MEM: { expectedSize /= 4; diff --git a/src/tests/JIT/Regression_2/Runtime_135844/Runtime_135844.cs b/src/tests/JIT/Regression_2/Runtime_135844/Runtime_135844.cs new file mode 100644 index 00000000000000..cc01f741ce6583 --- /dev/null +++ b/src/tests/JIT/Regression_2/Runtime_135844/Runtime_135844.cs @@ -0,0 +1,44 @@ +// Licensed to the .NET Foundation under one or more agreements. +// The .NET Foundation licenses this file to you under the MIT license. + +using System; +using System.Runtime.CompilerServices; +using System.Runtime.InteropServices; +using System.Runtime.Intrinsics; +using System.Runtime.Intrinsics.X86; +using Xunit; + +[StructLayout(LayoutKind.Explicit)] +struct State +{ + [FieldOffset(8)] + public ulong Coefficient; + + [FieldOffset(16)] + public ulong Other; +} + +public class Runtime_135844 +{ + [ConditionalFact(typeof(Avx512F), nameof(Avx512F.IsSupported))] + public static void TestEntryPoint() + { + State state = new() { Coefficient = 3, Other = 29 }; + Vector512 unsignedInput = Vector512.Create(2u); + Vector512 signedInput = Vector512.Create(2); + + Vector512 unsignedResult = MultiplyUnsigned(ref state, unsignedInput); + Vector512 signedResult = MultiplySigned(ref state, signedInput); + + Assert.Equal(Vector512.Create(6ul), unsignedResult); + Assert.Equal(Vector512.Create(6L), signedResult); + } + + [MethodImpl(MethodImplOptions.NoInlining)] + private static Vector512 MultiplyUnsigned(ref State state, Vector512 input) => + Avx512F.Multiply(input, Vector512.Create(state.Coefficient).AsUInt32()); + + [MethodImpl(MethodImplOptions.NoInlining)] + private static Vector512 MultiplySigned(ref State state, Vector512 input) => + Avx512F.Multiply(input, Vector512.Create(unchecked((long)state.Coefficient)).AsInt32()); +} diff --git a/src/tests/JIT/Regression_2/Runtime_135844/Runtime_135844.csproj b/src/tests/JIT/Regression_2/Runtime_135844/Runtime_135844.csproj new file mode 100644 index 00000000000000..f228743a1c2df9 --- /dev/null +++ b/src/tests/JIT/Regression_2/Runtime_135844/Runtime_135844.csproj @@ -0,0 +1,12 @@ + + + True + None + 1 + true + + + + + +