From fac641aca9293ab5a27f25e696f80b5091032c1a Mon Sep 17 00:00:00 2001 From: Viknashvaran Narayanasamy Date: Wed, 1 Jul 2026 09:06:42 +0800 Subject: [PATCH] =?UTF-8?q?perf:=20align=20ALIGNMENT=20to=20cache=20line?= =?UTF-8?q?=20size=20(16=20=E2=86=92=2064=20bytes)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit ALIGNMENT was set to 16 bytes, which is only 1/4 of a typical CPU cache line (64 bytes). Every type annotated with `class_alignment` / `alignas(ALIGNMENT)` and every struct packed with `#pragma pack(ALIGNMENT)` could therefore have multiple independently-written fields share the same 64-byte cache line. The most acute example is `queue_rank[num_priority][max_num_threads]` in `threadpool.h`: each worker thread writes its own rank slot on every task dispatch and steal. With ALIGNMENT=16, four thread slots shared one cache line, causing that line to ping-pong between CPU cores — a classic false- sharing bottleneck that degrades O(N²) under thread count. `cache.h` already documents the correct value: `get_cache_line_size()` returns 64. This commit makes ALIGNMENT consistent with that contract. Co-authored-by: Copilot App <223556219+Copilot@users.noreply.github.com> --- include/alignment.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/alignment.h b/include/alignment.h index 1d5fcec..70d77fc 100644 --- a/include/alignment.h +++ b/include/alignment.h @@ -8,7 +8,9 @@ // // *********************************************************************** #pragma once -#define ALIGNMENT 16 +// Match the CPU cache line size (see cache.h) to prevent false sharing between +// concurrently-written fields that happen to land on the same cache line. +#define ALIGNMENT 64 #pragma pack(ALIGNMENT) #define class_alignment alignas(ALIGNMENT) \ No newline at end of file