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chore: release v0.0.2 #3

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37 changes: 37 additions & 0 deletions CHANGELOG.md
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Expand Up @@ -7,6 +7,43 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0

## [Unreleased]

## [0.0.2](https://github.com/KarpelesLab/guide/compare/v0.0.1...v0.0.2) - 2026-11-07

### Added

- *(pcb)* escape routing from fine-pitch and area-array footprints
- *(pcb)* a second, finer pass for nets left unrouted, and defaults from measuring
- *(kicad)* write routes back into a board, and route the curated boards
- *(pcb)* route boards over the geometry layer, globally then in detail
- *(fpga)* tables of a VPR comparison can show an earlier run beside it
- *(fpga)* lookahead options in vtr_route, and its time in the tables
- *(fpga)* a map lookahead for RrGraph, and options that use it
- *(engine)* a bound weight, and incremental rerouting of nets
- *(search)* weighted bounds, and no queueing for a bound of the maximum
- *(dsn)* read Specctra DSN designs and write SES sessions
- *(fpga)* a harness to route VPR's designs and compare with VPR
- *(fpga)* RrGraph::engine_options, with history in the graph's units

### Fixed

- *(kicad)* keep new vias to the board's minimum hole, diameter and ring
- *(geom)* report a track or via over a hole when there is no hole clearance
- *(fpga)* leave a logic block through one output pin, as VPR requires

### Other

- bring the Freerouting comparison and M5 up to date with escape routing
- nk3-nrf-mini with escape routing, and the router's speedups
- *(pcb)* keep via verdicts while a net's own vias come and go
- *(pcb)* cache step verdicts and give up early on shut-in terminals
- *(pcb)* index arcs by their edges and resolve clearances once
- publish the first results of routing against Freerouting
- *(kicad)* route the curated boards with Freerouting and guide alike
- settle what a resource is on a PCB and how routing levels compose
- FPGA routing against VPR before and after the map lookahead
- record the DSN and SES comparisons with KiCad, and Freerouting's use
- publish FPGA routing results against VPR, and mark M3 done

## [0.0.1](https://github.com/KarpelesLab/guide/compare/v0.0.0...v0.0.1) - 2026-11-05

### Added
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2 changes: 1 addition & 1 deletion Cargo.toml
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@@ -1,6 +1,6 @@
[package]
name = "guide"
version = "0.0.1"
version = "0.0.2"
edition = "2024"
rust-version = "1.95"
description = "Placement and routing engine for PCBs, FPGAs and other constrained connection problems (early scaffold: no routing yet)."
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