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NVIDIA
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[None][fix] Guard MiniMax-M3 FP8 indexer against padded -1 cache slots
- #19113
#19113
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Sep 29, 2026
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[None][fix] Guard MiniMax-M3 FP8 indexer against padded -1 cache slots
#19113
brb-nv
merged 8 commits into
NVIDIA:main
NVIDIA/TensorRT-LLM:main
from
brb-nv:fix/minimax-m3-indexer-negative-slot-main
brb-nv/TensorRT-LLM:fix/minimax-m3-indexer-negative-slot-main
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Commits
Commits on Sep 29, 2026
[None][test] Cover the FP8 indexer's padded-slot guards
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[None][fix] Limit MiniMax-M3 decode kernels to the last real token
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[None][fix] Reset the MSA cache-slot tail a piecewise step pads into
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[None][test] Cover the wiring of the MiniMax-M3 padding guards
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fix test
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fix another test
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[None][chore] Fold the padding guards onto the counts already staged
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[None][chore] Drop the padding guards' two redundant layers
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