Add logical Warp Direct Load and Store by tpn · Pull Request #12114 · NVIDIA/cccl

tpn · 2026-10-21T04:12:22Z

Superseded by #12088, which now owns this implementation within its complete feature family. The original commits, branch and validation evidence remain available. This draft is closed unmerged.

Historical scope and validation below refer to the original source heads.

Logical warps of 1, 2, 4, 8, 16 or 32 lanes can use group-first Direct Load/Store with checked ownership and payload validity. Sibling groups may select different counts and defaults; finite sibling loops can reconverge before wider operations when memory-completion requirements are met. The guide includes an executable generic kernel, and algorithm options accept conversions such as LoadOptions::from(Transpose).

This draft includes the Physical-Warp and Block WarpTranspose prerequisites. Review the complete Logical feature and the toolchain and prerequisite update. The main-base diff is cumulative; the matching compiler is NVIDIA/cuda-rust#1593.

Local validation on Rust 1.99.1 passes host/docs/strict checks, 756 native specialization requests, all 128 compiler controls and three release builds. GPU checks pass the 13,342-value example and, in both Normal and Full profiles, 100 logical-Warp cases, fixed-grain bounds, 768 mixed Block/Warp values and 1,536 finite-cycle values. Seven sanitizer runs and the expected bounds trap with a successful health replay also pass. Rust host CI, upstream pre-commit and project checks pass. CodeRabbit skipped this draft.

All 53 executable sections, native ABIs, launch facts and scratch plans were inspected. Full cuobjdump --dump-elf still fails on debug locations whose payload and relocations match the earlier artifact; separate executable inspection succeeds. Complete DWARF validity remains unverified. Recorded instruction differences remain, and no performance equivalence is claimed.

Create a host-only Cargo workspace that specializes selected CUB forms through NVRTC and reports exact scratch layouts with their LTO output. Bind specialization identities to source, headers and toolkit bytes. Include a runnable provider example, Rust guide and CPU checks. Signed-off-by: Trent Nelson <trent@trent.me>

Install the pinned toolchain without updating rustup itself. Signed-off-by: Trent Nelson <trent@trent.me>

Serve native specialization batches through the versioned Oxide boundary and exercise Load and Store through a standalone Cargo consumer with a generic helper dependency. Signed-off-by: Trent Nelson <trent@trent.me>

Signed-off-by: Trent Nelson <trent@trent.me>

Reuse the same helper sites with 64- and 128-thread kernels and retain one device static across their emitted bodies. Check each launch plan and preserve fixed external-symbol diagnostics. Signed-off-by: Trent Nelson <trent@trent.me>

Select fixture output locations from raw CUDA coordinates and exercise payload initialization, access and copying at both item counts. Annotate compile-fail examples and clarify hierarchy ordering in the guide. Signed-off-by: Trent Nelson <trent@trent.me>

Signed-off-by: Trent Nelson <trent@trent.me> # Conflicts: # rust/Cargo.lock

Signed-off-by: Trent Nelson <trent@trent.me>