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适配STM32新以太网驱动的ops层，并增加PHY型号，修改adcv2驱动的默认日志等级 #11819

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适配STM32新以太网驱动的ops层，并增加PHY型号，修改adcv2驱动的默认日志等级 #11819

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524adfe
1. 修改adc驱动的默认日志等级
LQL2000 Sep 21, 2026
1199c7c
1. adc日志等级改为DBG_INFO
LQL2000 Sep 22, 2026
42fac63
1. 注释保持/**/风格
LQL2000 Oct 17, 2026
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2 changes: 1 addition & 1 deletion bsp/stm32/libraries/HAL_Drivers/drivers/drv_adc_v2.c
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Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,7 @@

#if defined(BSP_USING_ADC1) || defined(BSP_USING_ADC2) || defined(BSP_USING_ADC3) || defined(BSP_USING_ADC4)

#define DRV_DEBUG
// #define DRV_DEBUG

@CYFS3 CYFS3 Oct 23, 2026

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这个可以直接删掉，最好是另外一个pr来提交这个内容，看样子adcv2很多这个内容

#define LOG_TAG "drv.adc"
#include <drv_log.h>

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15 changes: 15 additions & 0 deletions bsp/stm32/libraries/HAL_Drivers/drivers/drv_eth.c
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Expand Up @@ -960,6 +960,17 @@ static rt_err_t eth_allocate_dma_memory(void)
return RT_EOK;
}

#ifdef RT_USING_DEVICE_OPS
const static struct rt_device_ops eth_ops = {
rt_stm32_eth_init,
rt_stm32_eth_open,
rt_stm32_eth_close,
rt_stm32_eth_read,
rt_stm32_eth_write,
rt_stm32_eth_control,
};
#endif

/* Register the EMAC device */
static int rt_hw_stm32_eth_init(void)
{
Expand Down Expand Up @@ -1003,12 +1014,16 @@ static int rt_hw_stm32_eth_init(void)
stm32_eth_device.dev_addr[4] = *(rt_uint8_t *)(UID_BASE + 2);
stm32_eth_device.dev_addr[5] = *(rt_uint8_t *)(UID_BASE + 0);

#ifdef RT_USING_DEVICE_OPS
stm32_eth_device.parent.parent.ops = &eth_ops;
#else
stm32_eth_device.parent.parent.init = rt_stm32_eth_init;
stm32_eth_device.parent.parent.open = rt_stm32_eth_open;
stm32_eth_device.parent.parent.close = rt_stm32_eth_close;
stm32_eth_device.parent.parent.read = rt_stm32_eth_read;
stm32_eth_device.parent.parent.write = rt_stm32_eth_write;
stm32_eth_device.parent.parent.control = rt_stm32_eth_control;
#endif
stm32_eth_device.parent.parent.user_data = RT_NULL;
stm32_eth_device.parent.eth_rx = rt_stm32_eth_rx;
stm32_eth_device.parent.eth_tx = rt_stm32_eth_tx;
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18 changes: 17 additions & 1 deletion bsp/stm32/libraries/HAL_Drivers/drivers/drv_eth.h
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Expand Up @@ -96,6 +96,22 @@
#define PHY_Status_SPEED_10M(sr) (!PHY_Status_SPEED_100M(sr))
#define PHY_Status_SPEED_100M(sr) ((sr) & PHY_100M_MASK)
#define PHY_Status_FULL_DUPLEX(sr) ((sr) & PHY_FULL_DUPLEX_MASK)
#endif /* defined(PHY_USING_LAN8720A) || defined(PHY_USING_LAN8742A) */

#elif defined(PHY_USING_SR8201F)
/* The PHY interrupt source flag register. */
#define PHY_INTERRUPT_FLAG_REG 0x1DU
/* The PHY interrupt mask register. */
#define PHY_INTERRUPT_MASK_REG 0x1EU
#define PHY_LINK_DOWN_MASK (1 << 4)
#define PHY_AUTO_NEGO_COMPLETE_MASK (1 << 6)
/* The PHY status register. */
#define PHY_Status_REG 0x00U
#define PHY_10M_MASK (1 << 2)
#define PHY_100M_MASK (1 << 13)
#define PHY_FULL_DUPLEX_MASK (1 << 8)
#define PHY_Status_SPEED_10M(sr) ((sr) & PHY_10M_MASK)
#define PHY_Status_SPEED_100M(sr) ((sr) & PHY_100M_MASK)
#define PHY_Status_FULL_DUPLEX(sr) ((sr) & PHY_FULL_DUPLEX_MASK)
#endif

@CYFS3 CYFS3 Oct 23, 2026

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少了 PHY_INT_MASK的定义


#endif /* __DRV_ETH_H__ */
2 changes: 1 addition & 1 deletion components/drivers/adc/adc_v2.c
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Expand Up @@ -21,7 +21,7 @@
#include <rtthread.h>

#define DBG_TAG "adc.v2"
#define DBG_LVL DBG_LOG
#define DBG_LVL DBG_INFO
#include <rtdbg.h>

#include <drivers/adc_v2.h>
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