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update-design skill: hermetic http_archive workflow - #242

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update-design-skill-hermetic
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update-design-skill-hermetic

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Brings .claude/skills/update-design/SKILL.md in line with the repo's hermetic RTL model. The Upstream Audit section still described git submodules and setup.sh tool pins, which no longer exist.

  • Audit step 1: audits design source pins as http_archive stanzas in MODULE.bazel, using the gh api .../compare commits-behind check. Adds a "patches at risk" note. Uses ternip, plus its shared @basejump_stl_src archive, as the worked example.
  • Audit step 2: audits the converter-tool pins (pip hubs, Maven/Chisel, sv2v, yosys-slang) that replaced setup.sh.
  • Audit step 3: reports how far the bazel-orfs pin is behind but hands the bump to /upgrade-tools. The old text described a git_override for ORFS that no longer exists.
  • D (FakeRAM): generates macros with bsg_fakeram via tools/regenerate_sram.sh and diff_sram_size.sh instead of hand-editing templates. It now covers:
    • the camelCase snap-key rule for asap7 cfgs
    • the check that no wd_in pin is DIRECTION OUTPUT in the LEF
    • the flip-flop stub fallback for memories too small for the generator
    • swapping in the macro via a declarative patch or by excluding the behavioral module from :rtl
  • E (porting): points at /port-design and adds gt2n clock-period guidance, derived from the current results.html.
  • Webpage refresh step: the platform count now includes gt2n.

🤖 Generated with Claude Code

Replace the stale git-submodule / setup.sh audit steps with the current
hermetic model: design sources are checksum-pinned http_archives in
MODULE.bazel, converter tools are Bazel pins (pip hubs, Maven, sv2v,
yosys-slang), and toolchain bumps are delegated to /upgrade-tools.
FakeRAM section now uses bsg_fakeram via tools/regenerate_sram.sh
(with the FF-stub fallback) instead of hand-edited templates; porting
points at /port-design and covers gt2n. Uses ternip as the worked
example throughout.

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