Fix ARM trailing data directive size#383
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| && !section.relocation_at(next_address.saturating_sub(4), 4).is_some_and(|relocation| { | ||
| relocation.address + self.data_reloc_size(relocation.flags) as u64 | ||
| > next_address - 2 | ||
| }) |
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When the last word contains multiple relocations, for example adjacent 16-bit relocations at next_address - 4 and next_address - 2, this only examines the first relocation returned for the 4-byte window. Section::relocation_at returns the first relocation at/after the start address, so the earlier relocation ending exactly at next_address - 2 makes this predicate false and the later relocation covering the halfword being trimmed is ignored, allowing the symbol-size inference to cut relocated data in half.
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Summary
$ddata directives while retaining trailing halfword padding removalTesting
cargo testCloses #382