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Codespace redesigned space spork wvqr6vwj76rc9xrw#79979

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Premiermoney and others added 4 commits May 23, 2026 21:27
Signed-off-by: Premiermoney <devjava21@proton.me>
Create generator-generic-ossf-slsa3-publish.yml
Signed-off-by: Premiermoney <devjava21@proton.me>
* [dev.simd] cmd/compile: fix latent regalloc bug

This was revealed during work on SIMD, down a path that
was later abandoned.  The failure occurs if a uint8 needs
to be moved into vector register, is moved into that register,
but then is spilled.  Because reasons, the unspill tried to
load a byte directly into an X register, which does not work.

There was a test that would fail on the abandoned path, but
now it does not, and I was not creative enough to figure out
how to trick the compiler into doing the same thing.

Change-Id: I0c0a81adea7019a89732a1dbdec91117b727bbb7
Reviewed-on: https://go-review.googlesource.com/c/go/+/776221
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Reviewed-by: Keith Randall <khr@golang.org>
Reviewed-by: Keith Randall <khr@google.com>

* [dev.simd] simd: rename CarrylessMultiply

This CL does this: Drop a and b control arguments (clearly non-portable). Replace with CarrylessMultiply(Even|EvenOdd|OddEven|Odd), Conveniently, this naming convention merges the behavior of CarrylessMultiply and CarrylessMultiplyGrouped so we don't need the separate "grouped" version.

For #78979.

Change-Id: Ib08cdf49f5c2ec01d550ed9f89d7d3b7193461f6
Reviewed-on: https://go-review.googlesource.com/c/go/+/776060
Reviewed-by: David Chase <drchase@google.com>
Auto-Submit: Junyang Shao <shaojunyang@google.com>
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* [dev.simd] simd: repair go.mod and import paths

Root the generator at _gen, just like it is done
in ssa/_gen.  This seems to work better once it is
done.

The command to update the files quickly was
(after git grep to confirm contents and git grep -l
to list them)

sed -e '1,$s?simd/archsimd/_gen?_gen?g;' -i "" <thefiles>

Change-Id: Ieefae140db0da2b37869170fce59fd24440b936b
Reviewed-on: https://go-review.googlesource.com/c/go/+/776961
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* [dev.simd] simd: remove stray "LoadSlice" from generated amd64 doc comment

Change-Id: I6820f032a072cf1b8f8febeb433a7d561f3fe60d
Reviewed-on: https://go-review.googlesource.com/c/go/+/776962
Reviewed-by: Alexander Musman <alexander.musman@gmail.com>
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* [dev.simd] simd, cmd/compile: unexport broadcast1ToN

For unexported methods, the Masked form is also generated into the API.
Since they are unexported, this CL didn't try removing them, even though
they have no references. But we might want them in the future!

For #78979.

Change-Id: Ied1b159a68b54785254b35ea61145dfdc27832b6
Reviewed-on: https://go-review.googlesource.com/c/go/+/775622
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* [dev.simd] simd, cmd/compile: reorder some shift op orders

This CL does this:
T.ConcatShiftBytesRight(Grouped)?(shift uint8, y T) T, T.ShiftAll(Left|Right)Concat(shift uint8, y T) T - Swap the arguments so it matches "concat(x,y)>>shift" and matches T.Shift(Left|Right)Concat(y T, shift T) T

For #78979.

Change-Id: I7d16e35d38352cd404782a71a07ab2b6fae4eda2
Reviewed-on: https://go-review.googlesource.com/c/go/+/776921
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* [dev.simd] simd/archsimd/_gen/unify: speed up environment expression pruning

Introduce a zero-allocation 128-bit bloom filter bitmask to track variable
presence within environment expression trees.

Previously, variable substitutions and lookups traversed entire expression
subtrees recursively even when the target variable was absent, leading to
excessive CPU usage and GC allocation pressure. By computing bitwise union
masks on sum and product nodes, we now instantly prune subtrees lacking the
target identifier in O(1) time.

This CL is generated by Gemini.

wall time compares:
before: ~123s
after: ~45s

Change-Id: I714c305f9420de1bded6b42d01284973003f7dcf
Reviewed-on: https://go-review.googlesource.com/c/go/+/777280
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* [dev.simd] simd, cmd/compile: change some shift documentations

This CL does:
Add ModN at the end of the name (where N is the element width) for
T.Shift(All)?(Left|Right)Concat(shift uint8, y T) T
and
T.Shift(All)?(Left|Right)(shift T, y T) T

For #78979

Change-Id: Ic22752e20e9589e35a7a64df1780d0a946c5ddb5
Reviewed-on: https://go-review.googlesource.com/c/go/+/776922
Auto-Submit: Junyang Shao <shaojunyang@google.com>
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* [dev.simd] simd, cmd/compile: change RoundToEven to Round

For #78979.

Change-Id: I7116fa731a18e201c5fc12874657f6d6ee38b374
Reviewed-on: https://go-review.googlesource.com/c/go/+/776960
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* [dev.simd] simd, cmd/compile: rename (Add|Sub)Pairs* to Concat(Add|Sub)Pairs*

For #78979.

Change-Id: I7a3f6fff272bc7630c116dc265d1677c0187d12a
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* [dev.simd] simd, cmd/compile: change Select(128)?FromPair names

This CL changes Select(128)?FromPair to ConcatPermute(128)?Scalars

For #78979.

Change-Id: Ida086183afad589e6c457c7f5fff508a71a5f2dd
Reviewed-on: https://go-review.googlesource.com/c/go/+/777020
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* [dev.simd] simd: update testdata/sample.go for renamed load/store APIs

Follow-on CL to CL 775600 which renamed LoadFloat64x4 to
LoadFloat64x4Array and Store to StoreArray. Noticed while
updating the arm64 variant of this sample program in CL 701998.

For #78979

Change-Id: I8a09cd0a965ecd7fce18948861fd594d873eb6d2
Reviewed-on: https://go-review.googlesource.com/c/go/+/777100
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* [dev.simd] cmd/compile: updated names in intrinsic registration

These were missed in one of the renaming passes.

Change-Id: I2489c7d533cbcdf31a3d51673171e792a5e8e73f
Reviewed-on: https://go-review.googlesource.com/c/go/+/777640
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* [dev.simd] simd: repair sub-par method/template names in intrinsics

Change-Id: I01f26582a81770bfec2870263dc56a70f016976e
Reviewed-on: https://go-review.googlesource.com/c/go/+/778860
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* [dev.simd] simd: change amd64 to support IfElse, not Merge

The old methods are still there, deprecated and
with go-fix-inline annotations.

Both versions of the tests, old and new,
are there for now.

Change-Id: I48d8403511088bae79668a7131a86fe760a97f63
Reviewed-on: https://go-review.googlesource.com/c/go/+/775941
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* [dev.simd] simd, cmd/compile: generalize simdgen and add initial ARM64 NEON intrinsics

Parametrize simdgen templates for intrinsics, SSA ops, rules, and types
by architecture instead of hardcoding AMD64, enabling ARM64 NEON code
generation end-to-end.

Add ARM64 categories and Go YAML configs for Add, Sub and Mul operations,
and generate the corresponding types, ops, intrinsics, SSA rules,
and codegen helpers.

Change-Id: I3ecb2e1cc669ec227cf2c6bb5980048d8fc3e1b4
Reviewed-on: https://go-review.googlesource.com/c/go/+/701998
Reviewed-by: David Chase <drchase@google.com>
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* [dev.simd] simd, cmd/compile: add WASM SIMD

This has most of the operations, and many tests.

The binary-search switch expansion includes fixes
from the main branch for retpoline, and for correctness
too.

Includes two small tweaks on the prior Neon CL.

Change-Id: Ifbbe7f5a705799a77b4f0092042f02e1b31e9fd6
Reviewed-on: https://go-review.googlesource.com/c/go/+/745080
Commit-Queue: David Chase <drchase@google.com>
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* [dev.simd] simd: reorganize simdgen YAML configs by architecture

Rename go.yaml to go_amd64.yaml and add go_arm64.yaml alongside it in
the shared ops/ directory, instead of using a separate arm64/ directory.
This keeps amd64 and arm64 configs symmetric under the same directory
structure and avoids duplicating the architecture-neutral categories.yaml
files.

No generated output changes beyond the "Code generated by" header line.

Change-Id: If09402452ed5a2279b49788797ce0b8e7e07a5f5
Reviewed-on: https://go-review.googlesource.com/c/go/+/773240
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Reviewed-by: David Chase <drchase@google.com>

* [dev.simd] simdgen: detect SetElem greg width from element width

Change-Id: I9b448e4f5c579c0f99d367ce9f5be8973c408d98
Reviewed-on: https://go-review.googlesource.com/c/go/+/752800
Reviewed-by: Junyang Shao <shaojunyang@google.com>
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* [dev.simd] cmd/compile: set simdRegMask for ARM64

Set simdRegMask=fp so the register allocator sees available registers.
On ARM64 floats occupy the lower part of NEON vectors, which in turn
occupy the lower 128 bits of SVE vectors.

Change-Id: I091c59b28b0be8011ac8889c21364eac40218fed
Reviewed-on: https://go-review.googlesource.com/c/go/+/780740
Reviewed-by: David Chase <drchase@google.com>
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* [dev.simd] simdgen: add ImmMax to limit immediate jump table size

Add ImmMax field to specify maximum immediate value for operations
with bounded indices (e.g., arm64 vector element access). This limits
jump table generation to the actual valid range instead of always
0-255.

Updates immJumpTable and adds opLen1Imm/opLen2Imm/opLen3Imm
variants that accept immMax parameter.

Change-Id: I8c95b3862da28d3cfe8de31bb6d25d731a5bb926
Reviewed-on: https://go-review.googlesource.com/c/go/+/752801
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* [dev.simd] simd: add GetElem and SetElem for ARM64 vectors

Add vector element access operations for both integer and float ARM64
SIMD types:
- GetElem: extract single element (VMOV/VDUP with index)
- SetElem: insert single element (INS instruction)

These are the most intrusive simdgen changes for ARM64; subsequent
ARM64 operations should require minimal simdgen modifications.

Change-Id: I235fb6650184c4119bed4b7475ece9adada52fca
Reviewed-on: https://go-review.googlesource.com/c/go/+/752802
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* [dev.simd] tmplgen: add ARM64 SIMD test generation support

Add arm64Shapes and ARM64 templates to tmplgen. Share template text
via constants. Update shared helpers build tags to remove amd64 restriction.
Delete simple.go in favor of new test infrastructure.

Change-Id: I04f71688eec3c1dbb92cb15ad654dc0f4d9ef798
Reviewed-on: https://go-review.googlesource.com/c/go/+/747966
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* [dev.simd] simd: add ARM64 NEON support for partial slice operations

Copy-exact partial slice operations from David Chase's wasm CL 745080,
the implementation is architecture-agnostic, using GetElem/SetElem.

This adds support for:
  - 8/16-bit: Int8x16, Int16x8, Uint8x16, Uint16x8
  - 32/64-bit: Int32x4, Int64x2, Float32x4, Float64x2, Uint32x4, Uint64x2

Example demonstrating partial load and partial store on ARM64:
```
        package main

        import (
                "fmt"
                "simd/archsimd"
        )

        func main() {
                var x = archsimd.LoadFloat32x4Part([]float32{1.5, 2.5, 3.5})
                var y = archsimd.LoadFloat32x4Part([]float32{0.5, 1.0, 1.5})
                z := x.Add(y)
                w := make([]float32, 3, 3)
                z.StorePart(w)
                fmt.Printf("w = %v\n", w)
        }
```
  Output: w = [2 3.5 5]

Change-Id: I3db637b82a9f0238d8d408fa4b78b1ea18e4867b
Reviewed-on: https://go-review.googlesource.com/c/go/+/752803
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* [dev.simd] simd: add ARM64 NEON Broadcast and String helpers

Add Broadcast functions that replicate a scalar value across all lanes
of a vector, using the ARM64 VDUP instruction.

This adds:
  - broadcast1To{2,4,8,16} methods on vector types (lowering to VDUP)
  - Broadcast{Type} constructors (e.g. BroadcastFloat32x4(3.14))
  - String() methods on all ARM64 vector types

Supports all element widths: B/H/S/D for signed, unsigned, and float types.

Example demonstrating broadcast and String on ARM64:
```
package main

import (
        "fmt"
        "simd/archsimd"
)

func main() {
        v := archsimd.BroadcastFloat32x4(2.5)
        w := v.Add(archsimd.BroadcastFloat32x4(v.GetElem(3)))
        fmt.Printf("w = %s\n", w.String())
}
```
Output: w = {5,5,5,5}

Change-Id: Ica3e6c06e4beebd288e82ff961a3201351ecd352
Reviewed-on: https://go-review.googlesource.com/c/go/+/767260
Reviewed-by: Junyang Shao <shaojunyang@google.com>
Reviewed-by: David Chase <drchase@google.com>
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* [dev.simd] simdgen: add argsMatchRule for broadcast-to-VMOVI folding

Implement parseArgsMatchRule to support custom argument patterns
in SSA lowering rules (currently arm64 only). Use it to fold
Broadcast1To16 of a constant into VMOVI.16B. The other arrangements
(H8,S4,D2) are currently pending assembler VMOVI support.

Change-Id: Id36d7e032a940f8261bda10281235e2b818700a3
Reviewed-on: https://go-review.googlesource.com/c/go/+/767261
Reviewed-by: David Chase <drchase@google.com>
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* [dev.simd] simd: add ARM64 NEON shift intrinsics

Add element-wise vector shift operations for ARM64 NEON,
supporting all integer element widths (B/H/S/D) for both signed
and unsigned types.

This adds:
  - Shift (SSHL/USHL): per-element shift by signed amount from a second vector
  - ShiftSaturated (SQSHL/UQSHL): saturating per-element shift
  - ShiftLeftConst/ShiftRightConst (VSHL/VSSHR/VUSHR): shift by compile-time constant
  - ShiftLeftSaturatedConst (VSQSHL/VUQSHL): saturating left shift by constant
  - ShiftAllLeft/ShiftAllRight: shift all lanes by a scalar uint64

Lowering uses new case-based specialLower rules for const-shift
(immediate encoding) and ShiftAll (broadcast + VSSHL/VUSHL
with CSEL clamping for out-of-range amounts).

Test helpers are generated via tmplgen into
arm64_shift_helpers_test.go (20 type-specialized helpers for
ShiftConst, ShiftAll, and mixed-type Shift).

Example demonstrating Shift, ShiftLeftSaturatedConst, and ShiftAllRight:
```
package main

import (
        "fmt"
        "simd/archsimd"
)

func main() {
        a := archsimd.LoadInt16x8([]int16{1, -1, 200, -200, 2049, -2049, 100, -100})
        amt := archsimd.LoadInt16x8([]int16{2, -1, 3, 1, -2, 4, 256, -3})
        fmt.Printf("%s\n%s\n%s\n",
                a.Shift(amt).String(),                 // {4,-1,1600,-400,512,32752,100,-13}
                a.ShiftLeftSaturatedConst(4).String(), // {16,-16,3200,-3200,32767,-32768,1600,-1600}
                a.ShiftAllRight(2).String())           // {0,-1,50,-50,512,-513,25,-25}
}
```

Change-Id: Ife4aac499d8732f613325828c0ac16fdb7bedf0c
Reviewed-on: https://go-review.googlesource.com/c/go/+/767262
Reviewed-by: David Chase <drchase@google.com>
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* [dev.simd] simd: add ARM64 NEON SetHi/GetHi methods

SetHi is emulated as VMOV Vn.D[0], Vd.D[1] and folded as destination of
narrow instruction into its variant that writes into upper half only.

GetHi is emulated as VMOV Vn.D[1], Dd and folded as a source of
long instruction into its variant reading upper half only.

Narrow and long instructions that these methods fold with will be added in follow-up CLs.

Simple example:
```
package main

import (
        "fmt"
        "simd/archsimd"
)

func main() {
        x := archsimd.LoadUint32x4Array(&[4]uint32{1, 2, 0xFF, 0xFF})
        y := archsimd.LoadUint32x4Array(&[4]uint32{10, 20, 0, 0})
        s := x.SetHi(y)
        g := s.GetHi()
        fmt.Printf("%v.SetHi(%v) = %v\n", x, y, s) // {1,2,255,255}.SetHi({10,20,0,0}) = {1,2,10,20}
        fmt.Printf("%v.GetHi() = %v\n", s, g)      // {1,2,10,20}.GetHi() = {10,20,0,0}
}
```

Change-Id: Iaf2a6eca15c2be7800eaf72f066227666c7c0d95
Reviewed-on: https://go-review.googlesource.com/c/go/+/773721
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Reviewed-by: David Chase <drchase@google.com>
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* [dev.simd] cmd/internal/obj/arm64: add ASIMD convert, long, and saturating narrow instructions

Add support for ASIMD shift-left-long, sign-extend-long, saturating
narrow, and float/int convert instructions:

| Operation                | Variants                            |
|--------------------------|-------------------------------------|
| Shift left long          | SSHLL/SSHLL2, SXTL/SXTL2            |
| Saturating narrow        | SQXTN/SQXTN2, UQXTN/UQXTN2          |
| Saturating narrow (s→u)  | SQXTUN/SQXTUN2                      |
| Float convert to int     | VFCVTZS, VFCVTZU                    |
| Int convert to float     | VSCVTF, VUCVTF                      |
| Float narrow/widen       | VFCVTN/VFCVTN2, VFCVTL/VFCVTL2      |

Change-Id: I2c274a16351dff0555bf4b60498b835ea4035f24
Reviewed-on: https://go-review.googlesource.com/c/go/+/775280
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Reviewed-by: David Chase <drchase@google.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>

* [dev.simd] simd: support ARM64 NEON narrow and long intrinsics

Support the "2" (upper-half) variants of narrowing and widening NEON
instructions purely through SSA folding rules: the lower-half base
instruction is paired with SetHi/GetHi and folded at compile time
(e.g. SHRN+SetHi → SHRN2).

Adds intrinsics for multiply-long, shift-left-long, shift-right-narrow,
and truncate (XTN, which folds from SHRN with shift=0).

Example Montgomery multiply from the 78498 issue, rewritten using intrinsics:
```
package main

import (
        "fmt"
        "simd/archsimd"
)

func main() {
        a := archsimd.LoadUint16x8Array(&[8]uint16{100, 3000, 42, 0, 1, 3328, 2048, 7})
        b := archsimd.LoadUint16x8Array(&[8]uint16{200, 500, 79, 0, 3328, 1, 128, 13})
        q := archsimd.BroadcastUint16x8(3329)
        qinv := archsimd.BroadcastUint16x8(62209)
        cLo := a.Mul(b)
        wLo := a.MulLoLong(b)
        wHi := a.GetHi().MulLoLong(b.GetHi())
        cHi := wLo.ShiftRightNarrowConst(16).SetHi(wHi.ShiftRightNarrowConst(16))
        t := cLo.Mul(qinv)
        tqLo := t.MulLoLong(q)
        tqHi := t.GetHi().MulLoLong(q.GetHi())
        cor := tqLo.ShiftRightNarrowConst(16).SetHi(tqHi.ShiftRightNarrowConst(16))
        fmt.Println(cHi.Sub(cor)) // {63272,65515,63677,0,65367,65367,4,64270}
}
```

Change-Id: Iffb0a0051aaeb5ef18c4724240485e140b052078
Reviewed-on: https://go-review.googlesource.com/c/go/+/775281
Reviewed-by: David Chase <drchase@google.com>
Reviewed-by: Junyang Shao <shaojunyang@google.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
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* [dev.simd] simd: add ARM64 NEON conversion intrinsics

Add Float ↔ Int (same-size), Float narrow/widen, signed and unsigned
integer extend, signed/unsigned saturating narrow intrinsics, and
signed ShiftLeftLoLongConst (VSSHLL).

Change-Id: I458c438abfb2741d4a53aedf739cca28f271f5fe
Reviewed-on: https://go-review.googlesource.com/c/go/+/776480
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Reviewed-by: David Chase <drchase@google.com>

* [dev.simd] simd: add ARM64 NEON bitwise logic intrinsics

Support: And, Or, Xor, AndNot (shared with amd64), OrNot, Not (arm64-only).
Useful for mask operations where NEON uses full-vector bitmasks.

Change-Id: I4dfa85a90a94325aedc2a514359ac65715bedebe
Reviewed-on: https://go-review.googlesource.com/c/go/+/775360
Reviewed-by: Junyang Shao <shaojunyang@google.com>
TryBot-Bypass: David Chase <drchase@google.com>
Reviewed-by: David Chase <drchase@google.com>

* [dev.simd] simd: add ARM64 NEON comparisons, Masked/IfElse, and helper intrinsics

Add hardware-backed comparison intrinsics (Equal, Greater, GreaterEqual)
with derived comparisons (Less, LessEqual, NotEqual), mask types with
Masked/IfElse methods using VBIT and VBIF, and Neg/Abs intrinsics for
all element types.  VBIF complements VBIT so that IfElse with an inverted
mask (e.g. from NotEqual) folds away the VNOT.

ARM64 NEON uses bitwise mask representation (all-0 or all-1 per lane).
Comparisons use CMEQ/CMGT/CMHI/CMGE/CMHS and FCMEQ/FCMGT/FCMGE.
Neg/Abs instrinsics are implemented with VNEG/VFNEG and VABS/VFABS.

Here is a small runnable example:
```
package main

import (
        "fmt"
        "simd/archsimd"
)

func main() {
        a := archsimd.LoadFloat32x4([]float32{1.0, -2.0, 3.0, -4.0})
        b := archsimd.LoadFloat32x4([]float32{10.0, 20.0, 30.0, 40.0})
        neg := a.Less(archsimd.Float32x4{})
        result := a.IfElse(neg, b)
        // Expected output: {0,1,0,1} {1,20,3,40} {0,-2,0,-4}
        fmt.Println(neg.String(), result.String(), a.Masked(neg).String())
}
```

Change-Id: I353c34bbcfc7bff25f0c094b3dd13d5ecfb9af53
Reviewed-on: https://go-review.googlesource.com/c/go/+/776560
Reviewed-by: Junyang Shao <shaojunyang@google.com>
Reviewed-by: David Chase <drchase@google.com>
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* [dev.simd] simd: add ARM64 NEON TBL/TBX table lookup intrinsics

Add LookupOrZero (TBL) and LookupOrKeep (TBX) byte-level table lookup
intrinsics for ARM64.

Both instructions take a register list operand ({Vn.16B}) that requires
special handling in the assembler. This CL adds only the single-register
list form; multi-register list variants (2-, 3-, and 4-register tables)
can be added in follow-ups. The 4-register variants would look like:

    func (table0 Int8x16) LookupOrZero4(table1, table2, table3, indices Int8x16) Int8x16
    func (keep Uint8x16) LookupOrKeep4(table0, table1, table2, table3, indices Uint8x16) Uint8x16

where the table is the concatenation of the table parameters, in order.

Change-Id: Ie5f373e192fb40bcc04352eceba13aa919e70072
Reviewed-on: https://go-review.googlesource.com/c/go/+/776580
Reviewed-by: Junyang Shao <shaojunyang@google.com>
TryBot-Bypass: David Chase <drchase@google.com>
Commit-Queue: David Chase <drchase@google.com>
Reviewed-by: David Chase <drchase@google.com>

* [dev.simd] simd: add ARM64 NEON arithmetic, rounding, and min/max intrinsics

Add the following ARM64 NEON intrinsics:

- Arithmetic: Div, Sqrt
- Rounding: Round, Floor, Ceil, Trunc
- Min/Max: Min, Max (float and integer variants)

Here is a small runnable example:
```
package main

import (
	"fmt"
	"simd/archsimd"
)

func main() {
	a := archsimd.LoadFloat32x4([]float32{1.5, -2.7, 3.3, -4.8})
	fmt.Println(a.Round().String()) // {2,-3,3,-5}
	fmt.Println(a.Floor().String()) // {1,-3,3,-5}
	fmt.Println(a.Ceil().String())  // {2,-2,4,-4}
	fmt.Println(a.Trunc().String()) // {1,-2,3,-4}
	fmt.Println(a.Sqrt().String())  // {1.2247449,NaN,1.8165902,NaN}
	b := archsimd.LoadFloat32x4([]float32{2.0, -3.0, 1.0, -5.0})
	fmt.Println(a.Max(b).String()) // {2,-2.7,3.3,-4.8}
	fmt.Println(a.Min(b).String()) // {1.5,-3,1,-5}
}
```

Change-Id: I49cb829929f592c79cec225eba71dbffbbebb562
Reviewed-on: https://go-review.googlesource.com/c/go/+/781480
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* [dev.simd] cmd/compile: mark Wasm vector registers callerSave

Wasm vector registers may be clobbered by a call, if a stack
switch occurs. Mark them so.

Change-Id: Ib6cda68b4e25213555eefc5cb5850a4d48c43300
Reviewed-on: https://go-review.googlesource.com/c/go/+/781963
Reviewed-by: David Chase <drchase@google.com>
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* [dev.simd] cmd/compile: mark AVX512 high registers and mask registers callerSave

AVX512 high registers (X/Y/Z16-31) and mask registers (K1-7) may be
clobbered by a call.

I had difficult time to construct a test that would fail without
the fix, though.

Change-Id: I8b368327120a8c8d758d84cfca6cb0b708f1f2eb
Reviewed-on: https://go-review.googlesource.com/c/go/+/781962
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* [dev.simd] simd: add ARM64 NEON ConcatShiftBytesRight intrinsic

Add Uint8x16.ConcatShiftBytesRight using the EXT instruction, matching
the existing amd64 VPALIGNR API. The EXT instruction concatenates two
128-bit vectors and extracts a contiguous 16-byte window at a byte offset.

Here is a simple example:
```
package main

import (
   "fmt"
   "simd/archsimd"
)

func main() {
   a := archsimd.LoadUint8x16([]uint8{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15})
   b := archsimd.LoadUint8x16([]uint8{16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31})
   fmt.Println(a.ConcatShiftBytesRight(b, 4))
   // Output: {20,21,22,23,24,25,26,27,28,29,30,31,0,1,2,3}
}
```

Change-Id: I6135c41c5f88bd237cc78665de9719b6abc57d81
Reviewed-on: https://go-review.googlesource.com/c/go/+/781560
Reviewed-by: David Chase <drchase@google.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
TryBot-Bypass: David Chase <drchase@google.com>

* [dev.simd] simd/archsimd/internal/simd_test: test InterleaveLo/Hi

Adds TestInterleaveLo and TestInterleaveHi covering the 128-bit
InterleaveLo/Hi methods and the AVX2/AVX512 InterleaveLoGrouped/
HiGrouped.

The new interleaveSlice helper is parameterized on lane width in bits
and a low/high flag so the same semantics model both x86 PUNPCKL*/
PUNPCKH* (laneBits=128) and, in the future, NEON ZIP1/ZIP2 (also
laneBits=128) and SVE ZIP1/ZIP2 (laneBits=0, meaning variable length
vector — whole input treated as one lane).

Change-Id: I4816c8185aaf8c8cf65b51c0b948cc9993af22cd
Reviewed-on: https://go-review.googlesource.com/c/go/+/777400
Reviewed-by: David Chase <drchase@google.com>
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Reviewed-by: Jonathan Swinney <jswinney@amazon.com>

* [dev.simd] simd: add ARM64 NEON shuffle intrinsics (Interleave/Deinterleave/Transpose)

Add InterleaveLo/Hi, DeinterleaveEven/Odd, and TransposeEven/Odd
for ARM64 NEON, backed by ZIP1/2, UZP1/2, and TRN1/2 instructions.

Change-Id: I81b8e3fab9467c887d6e0a747fbb7ecf6bc73594
Reviewed-on: https://go-review.googlesource.com/c/go/+/781900
Reviewed-by: David Chase <drchase@google.com>
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* [dev.simd] simd: add ARM64 NEON horizontal reduction intrinsics

Add ReduceSum, ReduceMax, ReduceMin intrinsics that reduce all vector
elements to a single value in element 0, mapped to NEON VADDV/VSMAXV/
VUMAXV/VSMINV/VUMINV/VFMAXV/VFMINV instructions, for example:
```
package main

import (
    "fmt"
    "simd/archsimd"
)

func main() {
    v := archsimd.LoadInt32x4([]int32{10, 20, 30, 40})
    // Output: sum=100, max=40, min=10
    fmt.Printf("sum=%d, max=%d, min=%d\n",
            v.ReduceSum().GetElem(0),
            v.ReduceMax().GetElem(0),
            v.ReduceMin().GetElem(0))
}
```

Change-Id: Ic6c813d6abf8964f5a9354d589b69ed5aa8e89e1
Reviewed-on: https://go-review.googlesource.com/c/go/+/781842
Reviewed-by: Cherry Mui <cherryyz@google.com>
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* [dev.simd] simd: add ARM64 NEON saturating, pairwise, and bit-count intrinsics

Add the following intrinsics mapped to their NEON instructions:
- AddSaturated/SubSaturated (VSQADD/VUQADD/VSQSUB/VUQSUB)
- AddPairs (VADDP/VFADDP)
- Average (VURHADD/VSRHADD)
- OnesCount (VCNT)
- LeadingZeros (VCLZ)
- LeadingSignBits (VCLS)
A small runnable example:
```
package main

import (
   "fmt"
   "simd/archsimd"
)

func main() {
   x := archsimd.LoadInt32x4([]int32{1, 3, 5, 7})
   y := archsimd.LoadInt32x4([]int32{10, 20, 30, 40})
   // [1+3, 5+7, 10+20, 30+40] = [4, 12, 30, 70]
   result := x.ConcatAddPairs(y)
   s := make([]int32, 4)
   result.Store(s)
   fmt.Println(s)
}
```

Change-Id: Ieece0441322211df1286ae1e50b23e694cf93a8f
Reviewed-on: https://go-review.googlesource.com/c/go/+/781843
Reviewed-by: Cherry Mui <cherryyz@google.com>
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* [dev.simd] simd: fix the operation sort order in wasm; it was broken

Change-Id: I8b6989b5e058b2da538d7631a656eb3dd8026bcd
Reviewed-on: https://go-review.googlesource.com/c/go/+/782081
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* cmd/go/internal/envcmd: print a default value for GOBIN

A continued source of confusion is: where does "go install" put the
binaries. The actual answer is somewhat complicated, see go.dev/cl/232017
But for the purposes of informing the user, we can have "go env" report
GOPATH[0]/bin (or their current GOPATH/bin) as the probable location
(ignoring cross compiles).

Fixes #23439
Fixes #45546
Updates #42823
Updates #44930

Change-Id: Ie705793db6090d2d735af1b62064c13c6a6a6964
Reviewed-on: https://go-review.googlesource.com/c/go/+/778560
Reviewed-by: qiu laidongfeng <2645477756@qq.com>
Reviewed-by: Michael Matloob <matloob@golang.org>
Reviewed-by: Michael Matloob <matloob@google.com>
Reviewed-by: Hyang-Ah Hana Kim <hyangah@gmail.com>
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* encoding/gob: cap map size when decoding

This avoids allocating too much memory on corrupt input.

Although encoding/gob makes no guarantees about adversarial input,
it easy enough to fix cases like this.

No test case because the problem can only happen for invalid data.
Let the fuzzer find cases like this.

For #47653
Fixes #79539

Change-Id: I2bd2059fe3fb72c6d84c1864e098522158e15032
Reviewed-on: https://go-review.googlesource.com/c/go/+/781684
Auto-Submit: Ian Lance Taylor <iant@golang.org>
Reviewed-by: Rob Pike <r@golang.org>
Reviewed-by: David Chase <drchase@google.com>
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* debug/dwarf: report underflow error on failure to read a varint

This avoids the possibility of endlessly looping trying
to read an entry from a corrupt input file.

This required changing a few test cases to pass a non-empty
abbrevs section, to avoid an underflow error parsing abbrevs.

No test case because the problem can only happen for invalid data.
Let the fuzzer find cases like this.

Also removed one existing test case with invalid data:
it expected a specific error that is now changed,
but the point is that it still fails.
And we should rely on the fuzzer anyhow.

Fixes #79586

Change-Id: I2cd58489fa2a24f67a6b6962776b3570e5b0b016
Reviewed-on: https://go-review.googlesource.com/c/go/+/781682
Reviewed-by: Florian Lehner <lehner.florian86@gmail.com>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Auto-Submit: Ian Lance Taylor <iant@golang.org>
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Reviewed-by: David Chase <drchase@google.com>

* cmd/go: return non-zero when go tool is interrupted

When a tool run through 'go tool' exits due to a signal,
exec.ExitError.ExitCode returns -1. Passing that value to
base.SetExitStatus left the go command's exit status unchanged at 0,
so interrupted tools such as 'go tool dist test' could appear to
succeed.

Treat signaled tool exits as a non-zero failure, and add a script test
covering an interrupted module tool.

Fixes #79535.
Fixes #79540.

Change-Id: Iec731a2efa44f0ee4d33de2133d50e74c088ab71
Reviewed-on: https://go-review.googlesource.com/c/go/+/781100
Reviewed-by: Dmitri Shuralyov <dmitshur@golang.org>
TryBot-Bypass: David Chase <drchase@google.com>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Auto-Submit: Dmitri Shuralyov <dmitshur@golang.org>
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* debug/elf: don't panic if SHN_XINDEX exceeds shnum

After setting shstrndx from SHN_XINDEX it is not re-checked against
shnum before accessing f.Sections[shstrndx].

No test case because the problem can only happen for invalid data.
Let the fuzzer find cases like this.

For #47653

Change-Id: I94bee86c47f57e6d85648c70ed130272c992171a
Reviewed-on: https://go-review.googlesource.com/c/go/+/781120
Reviewed-by: Ian Lance Taylor <iant@golang.org>
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Auto-Submit: Tobias Klauser <tobias.klauser@gmail.com>
Reviewed-by: Florian Lehner <lehner.florian86@gmail.com>
Reviewed-by: David Chase <drchase@google.com>

* runtime: loosen gc memory limit test on Darwin

Some more. Apparently CL 689315 and CL 708617 weren't quite enough.

Fixes #73136.

Change-Id: I72d27dfc35f9c646d92640401095c71c82359e3e
Reviewed-on: https://go-review.googlesource.com/c/go/+/782880
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Reviewed-by: Keith Randall <khr@google.com>

* cmd/compile: ensure evaluating array index expression

CL 774120 attempted to fix missing bounds checks for zero-sized arrays,
but the implementation was incomplete. It failed to account for nested
zero-sized types, where an index operation might still require a check
despite the inner element size.

This change generalizes the fix by evaluating the index expression,
and ensuring a bounds check is inserted for every array index
operation encountered, regardless of nesting depth.

Updates #79197
Fixes #79236

Change-Id: I2b97c81f779c8845f12f1ae519201c7af19cb497
Reviewed-on: https://go-review.googlesource.com/c/go/+/775120
Reviewed-by: Keith Randall <khr@golang.org>
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Auto-Submit: Cuong Manh Le <cuong.manhle.vn@gmail.com>
Reviewed-by: David Chase <drchase@google.com>
Reviewed-by: Keith Randall <khr@google.com>

* Create jekyll-docker.yml

Signed-off-by: Premiermoney <devjava21@proton.me>

* Create docker-image.yml

Signed-off-by: Premiermoney <devjava21@proton.me>

* [dev.simd] simd: update _gen/main.go and simdgen/main.go to work better

1) default to a newer arm64 spec
2) os.Exit(1) for failure
3) os.Exit(1) if an invoked command fails
4) use whatever go compiler happens to be on the path, instead
   of the one in GOROOT that was broken when an earlier invocation
   of _gen/main.go charged ahead and tried to 1go install cmd/.compile`
   after a subcommand failed.

Also corrected a cannot-compile bug in tmplgen/main.go, not sure
where that came from but this fixes it.

Change-Id: I81de3865eee5cada92cf45fa8535e9f46fa340da
Reviewed-on: https://go-review.googlesource.com/c/go/+/781960
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* net/http: ensure the same address family for HTTP/3 test client and server

Currently, when running tests, our HTTP/3 client uses a wildcard address
(i.e., ":0"), while the server uses "localhost:0". This should normally
be fine. Unfortunately, doing this causes a rare failure on Darwin,
where the client is unable to receive any packets sent to it by the
server during TLS handshakes.

Something akin to the following scenario seems to be causing the
failure.

For a given test:

1. Server listens on "localhost:0", and creates an IPv4 socket.
2. Client listens on ":0", and creates a dual-stack IPv6 socket.
3. The test runs, succeeds, and cleans up.
4. On Darwin, when closing UDP sockets, sometimes the ports are not
   immediately usable again.

Then, on a subsequent test:

1. Client once again listens on ":0", and happens to get assigned the
   same port as the previous test. Coincidentally, this very same port
   is available on IPv6 but not IPv4.
2. Due to Darwin's permissive binding, the dual-stack IPv6 binding still
   succeeds; however, the IPv4 support silently fails.
3. Eventually, as part of the test, the server's IPv4 packets are sent
   to the client, but cannot be received at all by the client that only
   supports IPv6.

For now, change the server to also listen on ":0". This ensures that the
test client and server will both be on the same address family, thus
avoiding the rare issue.

For #78737

Change-Id: Idc9fc766996b6b268c270ee1af5b854d6a6a6964
Reviewed-on: https://go-review.googlesource.com/c/go/+/782100
Reviewed-by: David Chase <drchase@google.com>
Reviewed-by: Damien Neil <dneil@google.com>
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* all: update vendored dependencies

The Go 1.27 code freeze has recently started. This is a time to update
all golang.org/x/... module versions that contribute packages to the
std and cmd modules in the standard library to latest master versions.

For #36905.

[git-generate]
go install golang.org/x/build/cmd/updatestd@latest
go install golang.org/x/tools/cmd/bundle@latest
updatestd -goroot=$(pwd) -branch=master

Change-Id: Ib9e65d6883f4b11f9dba04e78e6ec3b8e6e9caaa
Reviewed-on: https://go-review.googlesource.com/c/go/+/783080
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: David Chase <drchase@google.com>
Auto-Submit: Dmitri Shuralyov <dmitshur@golang.org>
TryBot-Bypass: Dmitri Shuralyov <dmitshur@golang.org>

* cmd/pprof: update vendored github.com/google/pprof

Pull in the latest published version of github.com/google/pprof
as part of the continuous process of keeping Go's dependencies
up to date.

For #36905.

[git-generate]
cd src/cmd
go get github.com/google/pprof@v0.0.0-20260507013755-92041b743c96
go mod tidy
go mod vendor

Change-Id: I85bbf7eb6450ba4923f9a3173627eebdab26d588
Reviewed-on: https://go-review.googlesource.com/c/go/+/783081
TryBot-Bypass: Dmitri Shuralyov <dmitshur@golang.org>
Auto-Submit: Dmitri Shuralyov <dmitshur@golang.org>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: David Chase <drchase@google.com>

* [dev.simd] simd: fix wasm bug; size was already 32

The smaller "extract lane" instructions return a 32-bit result
that does not need to be converted to a 32-bit result, and it
is an error to try.

Also add some generated files that seem not to have been added before.

Change-Id: I10aa2d94d039787ab58f11935a18bf8e03962569
Reviewed-on: https://go-review.googlesource.com/c/go/+/783060
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* cmd/compile: make lifting ops out of loops opt-in instead of opt-out

We have to be really careful about what opcodes we allow to be
lifted to earlier in the instruction stream. Lots of instructions
might fault or otherwise misbehave if they are issued before some
previous conditional check (bounds, nil, cpu feature, denominator
is zero, etc.)

Before this CL, we listed instructions which we *can't* lift.
After this CL, we list instructions we *can* lift. All others are
forbidden.

Fixes #78997

Change-Id: Idd6a799b5770d88cef9acde062656464c5124a07
Reviewed-on: https://go-review.googlesource.com/c/go/+/772962
Reviewed-by: Junyang Shao <shaojunyang@google.com>
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* cmd/compile: test for issue 78997

Update #78997

Change-Id: I18fc71ef442d59612983eac250d3b5ff2ad91aac
Reviewed-on: https://go-review.googlesource.com/c/go/+/771481
Reviewed-by: Keith Randall <khr@google.com>
Reviewed-by: Junyang Shao <shaojunyang@google.com>
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* cmd/compile: remove DIV special case

Now that liftable ops are opt-in instead of opt-out, remove
the hasSideEffects mark on divide operations.

This reverts most of CL 769700, except for the test.

Update #78892
Fixes #79545

Change-Id: Ia99b1700f852b71781d74efd1664450421aa766e
Reviewed-on: https://go-review.googlesource.com/c/go/+/772963
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Reviewed-by: Keith Randall <khr@google.com>

* cmd/compile: add earlyOk to all valid ops

A few notes:

- flags-generating instructions are generally not marked. It would be
  ok, but we don't want flags living longer than required. It would
  be nice, though, if we could lift a flag-generating op if the flag
  consuming op was *also* moved. Leaving for the future.

- DIV on arm64 and riscv64 don't fault on zero-divide, so they are included.

- amd64 was done in a previous CL.

- examined cmd/compile/internal/ssagen/intrinsics.go for instructions
  that are guarded by runtime checks.

Change-Id: I101e92f2fbf8517b01c20b3e01fb21270377cfa4
Reviewed-on: https://go-review.googlesource.com/c/go/+/772964
Reviewed-by: Keith Randall <khr@google.com>
Reviewed-by: Junyang Shao <shaojunyang@google.com>
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* runtime: remove asynctimerchan GODEBUG setting

For #76472.

Change-Id: Id6628c749f9794d32f86a4fca564deb0c71f4504
Reviewed-on: https://go-review.googlesource.com/c/go/+/781580
TryBot-Bypass: Dmitri Shuralyov <dmitshur@golang.org>
Reviewed-by: Damien Neil <dneil@google.com>
Reviewed-by: Robert Griesemer <gri@google.com>

* time: uncomment t.Fatalf call in a test

The t.Fatalf call was commented out since it was added in CL 568341.
We can either remove the check or enable the call. Since the test is
checking anyway (and is passing) we might as well enable the t.Fatalf.

Change-Id: Iaed15f9c04cdd6d489209f50b7bb46a15c1eec67
Reviewed-on: https://go-review.googlesource.com/c/go/+/781681
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Reviewed-by: Damien Neil <dneil@google.com>
Auto-Submit: Robert Griesemer <gri@google.com>

* [dev.simd] simd: cmd/compile: add wasm "Swizzle" SIMD operation

Name it "LookupOrZero", following neon.

Also modified wasmgen to reuse code from sgutil for writing files etc.

Change-Id: I01bc6a3140169c54f2313860f87c93a5dd31ed67
Reviewed-on: https://go-review.googlesource.com/c/go/+/782082
Reviewed-by: Cherry Mui <cherryyz@google.com>
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* [dev.simd] internal/buildcfg: disable SIMD experiment by default for merge to master

Change-Id: Id3f601d2010d896992ef36a337f2ef6305921110
Reviewed-on: https://go-review.googlesource.com/c/go/+/783022
Commit-Queue: Cherry Mui <cherryyz@google.com>
Reviewed-by: David Chase <drchase@google.com>
TryBot-Bypass: Cherry Mui <cherryyz@google.com>

* [dev.simd] simd, cmd/compile: AddSub->AddOddSubEven, MulAddSub->MulAddOddSubEven

I noticed that some new test helper files are generated, I assume it's
because the tree is in an instable shape, i.e. a regeneration is not run
after a generator change.

Change-Id: I3133fbbea1878fdfd8a0bf30a0e9adab7044b488
Reviewed-on: https://go-review.googlesource.com/c/go/+/783160
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Reviewed-by: Cherry Mui <cherryyz@google.com>

* [dev.simd] simd, cmd/compile: SumAbsDiff -> SumOf8AbsDiff

Change-Id: Ie3359e2ba575a7f220265b6ae921ade3c271c14a
Reviewed-on: https://go-review.googlesource.com/c/go/+/783021
Auto-Submit: Junyang Shao <shaojunyang@google.com>
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* [dev.simd] simd, cmd/compile: TruncateToX -> TruncToX

Change-Id: I17853b873e07a4d5e3da94ce7c62939e607200d0
Reviewed-on: https://go-review.googlesource.com/c/go/+/783001
Reviewed-by: David Chase <drchase@google.com>
Auto-Submit: Junyang Shao <shaojunyang@google.com>
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* Revert "[dev.simd] internal/buildcfg: disable SIMD experiment by default for merge to master"

This reverts commit 9816f3ec4a1cc6693ebfdf79b8d6213004005f63.

Reason for revert: merge is complete.

Change-Id: I33755453a2234b12cd623fa7bc71920f7a381b31
Reviewed-on: https://go-review.googlesource.com/c/go/+/783240
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Auto-Submit: David Chase <drchase@google.com>

* [dev.simd] cmd/compile: add html formatter for "syntax" version of IR

This produces output in the same style as the existing GOSSAFUNC
and "astdump" for IR.  It uses the same flag as astdump, thus:
```
go build  -gcflags=-d=astdump='~main.ip'  .
```
will produce pkg.function.html and pkg.function.syntax.html
for every "pkg.function" matching the regular expression
"main.ip". (Leading "~" means regexp, otherwise it matches
either function or package.function.)

Change-Id: Ifea3a0a7c564d5ba3f8b3eff712adab1062a3896
Reviewed-on: https://go-review.googlesource.com/c/go/+/758520
Reviewed-by: Alan Donovan <adonovan@google.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
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* [dev.simd] simd, cmd/compile: make all shift and rotate take uint64.

Change-Id: I9da4dedcecbb45a3e84bdb5702ea41882f66287c
Reviewed-on: https://go-review.googlesource.com/c/go/+/783003
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Reviewed-by: David Chase <drchase@google.com>

* cmd/go/internal/work: add signpost to x/tools vet std test

For #79622

Change-Id: I685b8aba3e976d0ca5358d62f42320873dd1826d
Reviewed-on: https://go-review.googlesource.com/c/go/+/783380
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
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Reviewed-by: Dmitri Shuralyov <dmitshur@golang.org>

* .github: update PULL_REQUEST_TEMPLATE to match the latest instruction

Update the wiki link too.

Change-Id: Ic3a780fa7fbdc7a7086e1a7f55932ab218d3fad9
Reviewed-on: https://go-review.googlesource.com/c/go/+/782000
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Auto-Submit: Hyang-Ah Hana Kim <hyangah@gmail.com>
Reviewed-by: Dmitri Shuralyov <dmitshur@golang.org>
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* spec: permit function type inference to satisfy assignability

Add an extra clause to the rules for assignability which permits
(possibly partially instantiated) generic functions to be assignable
to a variable of function type if the missing type parameters can
be inferred.

Update the section on type inference accordingly, as now we don't
need a special case for return statements and assignments anymore.
Instead, explain the type inference equation for the more general
function assignability case.

Added entry in the Appendix's Language versions section.

For #77245.

Change-Id: I8d42846d6e668661b211ed1fb3f27ffe9537a439
Reviewed-on: https://go-review.googlesource.com/c/go/+/768061
Reviewed-by: Mark Freeman <markfreeman@google.com>
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Reviewed-by: Robert Griesemer <gri@google.com>
Auto-Submit: Robert Griesemer <gri@google.com>

* [dev.simd] simd: for wasm, add MulWiden{Lo,Hi}

These are widening multiplies that OF COURSE widen different
elements than the amd64 equivalents.

After discussing with Cherry for a while, settled on these
names, for now.  Compare with amd64's MulEvenWiden (same as
this but for even elements instead of low or high half)
and MulHigh which returns the same-width high part of a
double-width instruction.  Arm64 currently uses "MulLoLong"
and we think that ought to change.  SVE, when we get there,
does the equivalent of MulWiden{Even,Odd} ({S,U}MULL{B,T}).

Change-Id: Id25c870840ca95d7f301e7ace76a6a025fc6b0d2
Reviewed-on: https://go-review.googlesource.com/c/go/+/783061
Auto-Submit: David Chase <drchase@google.com>
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* [dev.simd] simd: add some emulated methods to wasm

Some of these emulations might apply elsewhere.
Includes tests for the emulations.

Change-Id: Id94e964ed41b2f3c57d6e0b521799011db679722
Reviewed-on: https://go-review.googlesource.com/c/go/+/781260
Reviewed-by: Cherry Mui <cherryyz@google.com>
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* [dev.simd] simd: add some emulations to amd64

floating point abs
int8xNN Mul
uint8xNN Mul

Change-Id: I2e74dd6cbe6dae800c7cf1f5e9456ba7b5b8e7cf
Reviewed-on: https://go-review.googlesource.com/c/go/+/781261
TryBot-Bypass: David Chase <drchase@google.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>

* doc: document generic methods (update release notes)

For #77273.

Change-Id: I0ac17d333301a69955f92ca8d5766967a038b89d
Reviewed-on: https://go-review.googlesource.com/c/go/+/783361
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Reviewed-by: Dmitri Shuralyov <dmitshur@golang.org>
Auto-Submit: Robert Griesemer <gri@google.com>

* doc: document generalized function type inference (update release notes)

For #77245.

Change-Id: If36098fc36290fe2430d8ef996f35100f8113739
Reviewed-on: https://go-review.googlesource.com/c/go/+/783362
Auto-Submit: Robert Griesemer <gri@google.com>
Reviewed-by: Alan Donovan <adonovan@google.com>
Reviewed-by: Robert Griesemer <gri@google.com>
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* spec: added a few version references where they were missing

Change-Id: I30ea95f0d2c06d169ca01f5408819af2ed2a8cf3
Reviewed-on: https://go-review.googlesource.com/c/go/+/783363
Reviewed-by: Alan Donovan <adonovan@google.com>
Reviewed-by: Robert Griesemer <gri@google.com>
Auto-Submit: Robert Griesemer <gri@google.com>
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* doc: document new struct literal field selectors (update release notes)

For #9859.

Change-Id: Ib39e655fa603345f661e0b32bb56fd532854103c
Reviewed-on: https://go-review.googlesource.com/c/go/+/783400
Reviewed-by: Robert Griesemer <gri@google.com>
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* doc: document removal of gotypesalias GODEBUG setting (update release notes)

For #76472.

Change-Id: I4d34fb7ebb34bf7d989e7a2c74349d1435ab5d36
Reviewed-on: https://go-review.googlesource.com/c/go/+/783420
Reviewed-by: Alan Donovan <adonovan@google.com>
Reviewed-by: Robert Griesemer <gri@google.com>
Auto-Submit: Robert Griesemer <gri@google.com>
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* doc: document removal of asynctimerchan GODEBUG setting (update release notes)

For #76472.

Change-Id: I1f470cee6b845e4d1fe4d48fd37ac11bbea26fda
Reviewed-on: https://go-review.googlesource.com/c/go/+/783421
Reviewed-by: Robert Griesemer <gri@google.com>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Auto-Submit: Robert Griesemer <gri@google.com>
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* log/slog: use encoding.TextAppender for text handlers

Fixes #79672

Change-Id: I0b77742104708d481ee52d16643d0aba6a6a6964
Reviewed-on: https://go-review.googlesource.com/c/go/+/783340
Reviewed-by: David Chase <drchase@google.com>
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Auto-Submit: Jonathan Amsterdam <jba@google.com>

* debug/elf: add FuzzReader

Add a fuzzing test for debug/elf similar to the one added for debug/pe
in https://go.dev/cl/780360.

Change-Id: If6e19a95f65f1ace2eb768a5184d700a932f6378
Reviewed-on: https://go-review.googlesource.com/c/go/+/781180
Reviewed-by: Ian Lance Taylor <iant@golang.org>
Reviewed-by: David Chase <drchase@google.com>
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Auto-Submit: Tobias Klauser <tobias.klauser@gmail.com>
Reviewed-by: Florian Lehner <lehner.florian86@gmail.com>

* encoding/json/jsontext: remove ineffectual subtraction

The i-0 might make sense if there was symmetry elsewhere
in the same function, but it looks odd on its own.

Change-Id: Ie7b7c94968ca19fed842212387659f0338caae3b
Reviewed-on: https://go-review.googlesource.com/c/go/+/775301
Reviewed-by: David Chase <drchase@google.com>
Reviewed-by: Junyang Shao <shaojunyang@google.com>
Reviewed-by: Joseph Tsai <joetsai@digital-static.net>
Reviewed-by: Daniel Martí <mvdan@mvdan.cc>
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* encoding/json/jsontext: use consistent receiver

Other instances of encodeBuffer were using e as the receiver.
Switch to using e consistently.

Change-Id: Icb74c58ddde8aee7f2c6c16c4716034b0cf9ebd8
Reviewed-on: https://go-review.googlesource.com/c/go/+/775406
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Reviewed-by: Daniel Martí <mvdan@mvdan.cc>
Reviewed-by: Joseph Tsai <joetsai@digital-static.net>
Reviewed-by: David Chase <drchase@google.com>

* encoding/json/jsontext: correct invalid namespace error

Previously, we were wrapping a nil error. Use errInvalidNamespace
as is the pattern from WriteToken.

Change-Id: I0e03ed479b113b321a28647aa0c573f06572d53f
Reviewed-on: https://go-review.googlesource.com/c/go/+/775143
Reviewed-by: Daniel Martí <mvdan@mvdan.cc>
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Reviewed-by: Joseph Tsai <joetsai@digital-static.net>
Reviewed-by: David Chase <drchase@google.com>

* debug/gosym: mask bracketed expressions rather than remove them

nameWithoutInst currently removes bracketed expressions from
instantiated symbols, making T.M[go.shape.int] T.M, so that the
dot "." can be used to split the string.

Because this operation does not preserve indices between
sym.Name and nameWithoutInst(sym.Name), we have to do a bit
more bookkeeping.

This change instead writes underscores, making T.M[go.shape.int]
look like T.M[____________]. This helps to naturally support
generic methods while simplifying some of our other logic.

Change-Id: Ie0e079f653236903a7338382ef790b22098f1b0a
Reviewed-on: https://go-review.googlesource.com/c/go/+/783244
Reviewed-by: Robert Griesemer <gri@google.com>
Reviewed-by: Alessandro Arzilli <alessandro.arzilli@gmail.com>
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* [dev.simd] simd: fix arm64 test build for TruncTo and uint64 shifts

Two recent renames left the arm64 test tree failing 'go vet simd/...':

1. The 'TruncateToX -> TruncToX' rename in CL 783001 (commit
   3e04a409d1) was applied as a sed-style replacement on identifiers
   that already started with 'TruncateTo', producing 'TruncToTo*'
   (note the doubled 'To') in the hand-authored TestTruncateArm64.
   The methods on the archsimd types are spelled TruncToInt8/16/32
   and TruncToUint8/16/32; replace the six call sites in
   arm64_convert_test.go with the correct names.

2. The 'shift and rotate take uint64' change in CL 783003 (commit
   fed139a1b3) widened the shift-amount parameter on every Int*/Uint*
   shift method to uint64, but left the arm64 test helpers and slice
   simulators on uint8. Update them to match:

   - _gen/tmplgen/main.go shiftConstTestTemplateArm64 generates
     uint64-typed test helpers (function signature and the inner
     amt-range slice).
   - arm64_shift_helpers_test.go is the corresponding regenerated
     output.
   - simulation_helpers_test.go shift{Left,Right}ByConstSlice and
     shiftLeftSaturating{,U}ByConstSlice now take uint64.
   - arm64_shift_test.go testShiftConstAmt and the
     TestConcatShiftBytesRight closures (csbr, hide, shift loop) take
     uint64 to match ConcatShiftBytesRight's widened parameter.

After this change 'go vet simd/...' is clean and 'go test simd/...'
passes on linux/arm64.

Change-Id: I106f6e1d7e8df70201f3969b193747c812984805
Reviewed-on: https://go-review.googlesource.com/c/go/+/783880
Reviewed-by: David Chase <drchase@google.com>
LUCI-TryBot-Result: golang-scoped@luci-project-accounts.iam.gserviceaccount.com <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Auto-Submit: Junyang Shao <shaojunyang@google.com>
Reviewed-by: Junyang Shao <shaojunyang@google.com>

* crypto/x509: split candidate hostname only once

(*x509.Certificate).VerifyHostname previously called matchHostnames in a
loop over all DNS Subject Alternative Name (SAN) entries. This caused
strings.Split(host, ".") to execute repeatedly on the same input
hostname.

With a large DNS SAN list, verification costs scaled quadratically based
on the number of SAN entries multiplied by the hostname's label count.
Because x509.Verify validates hostnames before building the certificate
chain, this overhead occurred even for untrusted certificates.

Thanks to Jakub Ciolek <jakub@ciolek.dev> for reporting this issue.

Fixes #79694
Fixes CVE-2026-27145

Change-Id: I2788b8ee22ffd28e45bcc7b0d860549084906a74
Reviewed-on: https://go-review.googlesource.com/c/go/+/783621
LUCI-TryBot-Result: golang-scoped@luci-project-accounts.iam.gserviceaccount.com <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: David Chase <drchase@google.com>
Reviewed-by: Neal Patel <neal@golang.org>

* [dev.simd] simd: fix doc comments in slicepart_128.go

In the Int<->Uint swap induced by the change to bit-punning
methods, some comments were missed.

Change-Id: I7fb6a10195f01816e310ac9f1e649bbde1…
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@seankhliao seankhliao closed this Jun 12, 2026
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