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Fit the nRF54L05/L10 application RAM to the parts, release 0.5.1 - #11
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Both linker scripts used the nRF54L15 RAM top: RAM up to 0x2003FF80 and the bootloader NOINIT area at 0x2003FF80. The L05 has 96 KB of RAM and the L10 192 KB, so the initial stack pointer and the NOINIT area were outside RAM, and the bootloader's peer data and double-reset marker were not where the bootloader writes them. RAM now ends at 0x20017F80 (L05) and 0x2002FF80 (L10), with NOINIT there, as in the bootloader's nrf54l05.ld and nrf54l10.ld.
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The nRF54L05 and nRF54L10 linker scripts used the nRF54L15 RAM top: RAM up to
0x2003FF80and the bootloader NOINIT area at0x2003FF80. The L05 has 96 KB of RAM and the L10 192 KB, so the initial stack pointer and the NOINIT area were outside RAM, and the bootloader's peer data and double-reset marker were not where the bootloader writes them. Present since 0adb43a; neither part has been tested on hardware.nrf54l05_s145_v10.ld: RAM0x20004800, length0x13780; NOINIT at0x20017F80nrf54l10_s145_v10.ld: RAM0x20004800, length0x2B780; NOINIT at0x2002FF80Both match nRF54_Bootloader's
linker/nrf54l05.ldandlinker/nrf54l10.ld(v0.5.0). AGENTS.md and README.md give the per-chip RAM end.Second commit: changelog and
package.jsonfor 0.5.1. After the merge, the squash commit gets the v0.5.1 tag; meshtastic/platform-nordicnrf54#3 then pins it, together with the matching L05/L10maximum_size/maximum_ram_size.