Repository navigation
gh-131999: Add support for tvOS, visionOS and watchOS. #159944
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
base: main
Are you sure you want to change the base?
Changes from all commits
8a85713
db8dd39
1fcfbe3
7509ea1
06b3e3c
35099de
File filter
Filter by extension
Conversations
Jump to
Diff view
Diff view
There are no files selected for viewing
| Original file line number | Diff line number | Diff line change |
|---|---|---|
|
|
@@ -166,12 +166,17 @@ static inline void* mi_prim_tls_slot(size_t slot) mi_attr_noexcept { | |
| __asm__ volatile ("mrc p15, 0, %0, c13, c0, 3\nbic %0, %0, #3" : "=r" (tcb)); | ||
| res = tcb[slot]; | ||
| #elif defined(__aarch64__) | ||
| void** tcb; MI_UNUSED(ofs); | ||
| // CPython: patched for watchOS support. | ||
| // Submitted upstream as microsoft/mimalloc#1444 | ||
| // Use a 64-bit temporary: on arm64_32 (ILP32), pointers are 32 bits | ||
| // but system registers are 64 bits. | ||
| uint64_t tp; MI_UNUSED(ofs); | ||
| #if defined(__APPLE__) // M1, issue #343 | ||
| __asm__ volatile ("mrs %0, tpidrro_el0\nbic %0, %0, #7" : "=r" (tcb)); | ||
|
Member
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Could you add comment when you adding downstream code here Something like:
Member
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. We need this when we upgrade mimalloc to the latest version
Contributor
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Also any chance you could try and upstream this to mimalloc? It seems like it's moved around a little but I think it's here now: https://github.com/microsoft/mimalloc/blob/dev3/include/mimalloc/prim/prim-tls.h#L103C15-L103C19 If we can get it upstreamed into the v3 branch then when we upgrade it'll just be there.
Contributor
Author
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. I've added a comment; and I've submitted microsoft/mimalloc#1444 to upstream the equivalent change in mimalloc v3. |
||
| __asm__ volatile ("mrs %0, tpidrro_el0\nbic %0, %0, #7" : "=r" (tp)); | ||
| #else | ||
| __asm__ volatile ("mrs %0, tpidr_el0" : "=r" (tcb)); | ||
| __asm__ volatile ("mrs %0, tpidr_el0" : "=r" (tp)); | ||
| #endif | ||
| void** tcb = (void**)(uintptr_t)tp; | ||
| res = tcb[slot]; | ||
| #elif defined(__riscv) | ||
| void** tcb; MI_UNUSED(ofs); | ||
|
|
@@ -200,12 +205,15 @@ static inline void mi_prim_tls_slot_set(size_t slot, void* value) mi_attr_noexce | |
| __asm__ volatile ("mrc p15, 0, %0, c13, c0, 3\nbic %0, %0, #3" : "=r" (tcb)); | ||
| tcb[slot] = value; | ||
| #elif defined(__aarch64__) | ||
| void** tcb; MI_UNUSED(ofs); | ||
| // Use a 64-bit temporary: on arm64_32 (ILP32), pointers are 32 bits | ||
| // but system registers are 64 bits. | ||
| uint64_t tp; MI_UNUSED(ofs); | ||
| #if defined(__APPLE__) // M1, issue #343 | ||
| __asm__ volatile ("mrs %0, tpidrro_el0\nbic %0, %0, #7" : "=r" (tcb)); | ||
| __asm__ volatile ("mrs %0, tpidrro_el0\nbic %0, %0, #7" : "=r" (tp)); | ||
| #else | ||
| __asm__ volatile ("mrs %0, tpidr_el0" : "=r" (tcb)); | ||
| __asm__ volatile ("mrs %0, tpidr_el0" : "=r" (tp)); | ||
| #endif | ||
| void** tcb = (void**)(uintptr_t)tp; | ||
| tcb[slot] = value; | ||
| #elif defined(__riscv) | ||
| void** tcb; MI_UNUSED(ofs); | ||
|
|
||
Uh oh!
There was an error while loading. Please reload this page.