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Remove channels_last requirement for pool ops via explicit permutes (#21796) - #21796

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Remove channels_last requirement for pool ops via explicit permutes (#21796)#21796
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export-D113943678

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@mcremon-meta mcremon-meta commented Aug 12, 2026

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Summary:

Changes the cortex_m pool ops (avg_pool2d, max_pool2d) from the
"logical-NCHW-shape + NHWC-physical (channels_last dim_order)" contract to a
"logical-NHWC-shape, plain contiguous" contract, bridged to the surrounding NCHW
graph by explicit aten.permute_copy nodes. This lets the pool ops run when the
graph is contiguous (e.g. _skip_dim_order=True or channels_last not propagated),
which previously failed at runtime with:
cortex_m_ops_common.h: quantized_avg_pool2d_out: tensors must use channels_last
dimension order

The CMSIS pool kernels already treat the data pointer as physically NHWC; the
physical bytes are identical in both contracts, so the kernel change is only how
dims are read (NHWC positions) plus dropping the channels_last check.

Changes (mirrored fbcode + xplat, DirSync-identical):

  • ops/cortex_m_ops_common.h (prepare_cmsis_pool2d_config): read dims from NHWC
    positions (size(1)=H, size(2)=W, size(3)=C), compare batch/channels at
    size(0)/size(3), and drop the require_channels_last parameter/check.
  • ops/op_quantized_avg_pool2d.cpp: update call site; NHWC-consistent.
  • ops/operators.py: pool fake-metas use NHWC-shaped I/O; the avg_pool2d and
    max_pool2d reference impls permute NHWC<->NCHW around F.*_pool2d and return
    NHWC-shaped output (consistent with the NHWC kernel contract).
  • passes/aten_to_cortex_m_pass.py: pool replacements insert explicit
    permute_copy (NCHW->NHWC before, NHWC->NCHW after); pad reworked for NHWC;
    qparams preserved.
  • passes/scratch_buffer_sizes.py: pool scratch sizing uses NHWC-shaped I/O.

Differential Revision: D113943678

@mcremon-meta
mcremon-meta requested a review from rascani as a code owner August 12, 2026 23:49
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pytorch-bot Bot commented Aug 12, 2026

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🔗 Helpful Links

🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/21796

Note: Links to docs will display an error until the docs builds have been completed.

❌ 2 New Failures

As of commit 75262bb with merge base 43f89fb (image):

NEW FAILURES - The following jobs have failed:

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@meta-cla meta-cla Bot added the CLA Signed This label is managed by the Facebook bot. Authors need to sign the CLA before a PR can be reviewed. label Aug 12, 2026
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@mcremon-meta has exported this pull request. If you are a Meta employee, you can view the originating Diff in D113943678.

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@AdrianLundell do you mind taking a look when you're back and get a chance? :)

@mcremon-meta mcremon-meta changed the title Remove channels_last requirement for pool ops via explicit permutes [Arm][CortexM] Remove channels_last requirement for pool ops via explicit permutes Aug 12, 2026
@meta-codesync meta-codesync Bot changed the title [Arm][CortexM] Remove channels_last requirement for pool ops via explicit permutes Remove channels_last requirement for pool ops via explicit permutes (#21796) Aug 13, 2026
meta-codesync Bot pushed a commit that referenced this pull request Aug 13, 2026
…21796)

Summary:

Changes the cortex_m pool ops (avg_pool2d, max_pool2d) from the
"logical-NCHW-shape + NHWC-physical (channels_last dim_order)" contract to a
"logical-NHWC-shape, plain contiguous" contract, bridged to the surrounding NCHW
graph by explicit aten.permute_copy nodes. This lets the pool ops run when the
graph is contiguous (e.g. _skip_dim_order=True or channels_last not propagated),
which previously failed at runtime with:
  cortex_m_ops_common.h: quantized_avg_pool2d_out: tensors must use channels_last
  dimension order

The CMSIS pool kernels already treat the data pointer as physically NHWC; the
physical bytes are identical in both contracts, so the kernel change is only how
dims are read (NHWC positions) plus dropping the channels_last check.

Changes (mirrored fbcode + xplat, DirSync-identical):
- ops/cortex_m_ops_common.h (prepare_cmsis_pool2d_config): read dims from NHWC
  positions (size(1)=H, size(2)=W, size(3)=C), compare batch/channels at
  size(0)/size(3), and drop the require_channels_last parameter/check.
- ops/op_quantized_avg_pool2d.cpp: update call site; NHWC-consistent.
- ops/operators.py: pool fake-metas use NHWC-shaped I/O; the avg_pool2d and
  max_pool2d reference impls permute NHWC<->NCHW around F.*_pool2d and return
  NHWC-shaped output (consistent with the NHWC kernel contract).
- passes/aten_to_cortex_m_pass.py: pool replacements insert explicit
  permute_copy (NCHW->NHWC before, NHWC->NCHW after); pad reworked for NHWC;
  qparams preserved.
- passes/scratch_buffer_sizes.py: pool scratch sizing uses NHWC-shaped I/O.

Differential Revision: D113943678
@meta-codesync
meta-codesync Bot force-pushed the export-D113943678 branch from 0ad9c82 to 2a56c36 Compare August 13, 2026 04:33
…21796)

Summary:

Changes the cortex_m pool ops (avg_pool2d, max_pool2d) from the
"logical-NCHW-shape + NHWC-physical (channels_last dim_order)" contract to a
"logical-NHWC-shape, plain contiguous" contract, bridged to the surrounding NCHW
graph by explicit aten.permute_copy nodes. This lets the pool ops run when the
graph is contiguous (e.g. _skip_dim_order=True or channels_last not propagated),
which previously failed at runtime with:
  cortex_m_ops_common.h: quantized_avg_pool2d_out: tensors must use channels_last
  dimension order

The CMSIS pool kernels already treat the data pointer as physically NHWC; the
physical bytes are identical in both contracts, so the kernel change is only how
dims are read (NHWC positions) plus dropping the channels_last check.

Changes (mirrored fbcode + xplat, DirSync-identical):
- ops/cortex_m_ops_common.h (prepare_cmsis_pool2d_config): read dims from NHWC
  positions (size(1)=H, size(2)=W, size(3)=C), compare batch/channels at
  size(0)/size(3), and drop the require_channels_last parameter/check.
- ops/op_quantized_avg_pool2d.cpp: update call site; NHWC-consistent.
- ops/operators.py: pool fake-metas use NHWC-shaped I/O; the avg_pool2d and
  max_pool2d reference impls permute NHWC<->NCHW around F.*_pool2d and return
  NHWC-shaped output (consistent with the NHWC kernel contract).
- passes/aten_to_cortex_m_pass.py: pool replacements insert explicit
  permute_copy (NCHW->NHWC before, NHWC->NCHW after); pad reworked for NHWC;
  qparams preserved.
- passes/scratch_buffer_sizes.py: pool scratch sizing uses NHWC-shaped I/O.

Differential Revision: D113943678
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