Promotes 5 Thumb-mode bare-metal Arm targets to Tier 2 by cezarbbb · Pull Request #155763 · rust-lang/rust

cezarbbb · 2026-04-25T03:43:22Z

This PR promotes five Thumb-mode bare-metal Arm targets to Tier 2, joining their Arm-mode counterparts which are already Tier 2:

Thumb-mode target (Tier 3 → Tier 2)	Arm-mode counterpart (already Tier 2)
`thumbv7a-none-eabi`	`armv7a-none-eabi`
`thumbv7a-none-eabihf`	`armv7a-none-eabihf`
`thumbv7r-none-eabi`	`armv7r-none-eabi`
`thumbv7r-none-eabihf`	`armv7r-none-eabihf`
`thumbv8r-none-eabihf`	`armv8r-none-eabihf`

Note: There is no thumbv8r-none-eabi target because the Cortex-R52 processor always includes an FPU, making a soft-float ABI variant unnecessary.

These Thumb-mode targets generate T32 code by default while their Arm-mode counterparts generate A32 code. They share the same LLVM backend, ABI, and data layout — the only spec differences are the llvm_target string and the description.

See rust-lang/compiler-team#985

rustbot · 2026-04-25T03:43:25Z

Some changes occurred in src/doc/rustc/src/platform-support

cc @Noratrieb

These commits modify compiler targets.
(See the Target Tier Policy.)

rustbot · 2026-04-25T03:43:27Z

r? @adwinwhite

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petrochenkov · 2026-04-27T15:20:17Z

Blocked on rust-lang/compiler-team#985.
@rustbot blocked

cezarbbb · 2026-04-28T12:33:45Z

@rustbot ping arm-maintainers
As the T32 and A32 targets share a page in the rustc book, can you continue to be the maintainers of these targets?

rustbot · 2026-04-28T12:33:48Z

Error: Only Rust team members can ping teams.

Please file an issue on GitHub at triagebot if there's a problem with this bot, or reach out on #triagebot on Zulip.

SparrowLii · 2026-04-28T12:35:40Z

@rustbot ping arm-maintainers
:)

rustbot · 2026-04-28T12:35:43Z

Error: This team (arm-maintainers) cannot be pinged via this command; it may need to be added to triagebot.toml on the default branch.

Please file an issue on GitHub at triagebot if there's a problem with this bot, or reach out on #triagebot on Zulip.

thejpster · 2026-05-02T16:29:56Z

arm-maintainers said yes over on rust-lang/compiler-team#985 (comment) (just for anyone else looking at this without looking at that thread first)

rustbot · 2026-05-30T01:27:38Z

This PR was rebased onto a different main commit. Here's a range-diff highlighting what actually changed.

Rebasing is a normal part of keeping PRs up to date, so no action is needed—this note is just to help reviewers.

cezarbbb · 2026-06-01T10:27:42Z

@petrochenkov The FCP is complete

petrochenkov · 2026-06-01T11:32:14Z

@bors r+

rust-bors · 2026-06-01T11:32:17Z

📌 Commit f45a817 has been approved by petrochenkov

It is now in the queue for this repository.

…=petrochenkov Promotes 5 Thumb-mode bare-metal Arm targets to Tier 2 This PR promotes five Thumb-mode bare-metal Arm targets to Tier 2, joining their Arm-mode counterparts which are already Tier 2: | Thumb-mode target (Tier 3 → Tier 2) | Arm-mode counterpart (already Tier 2) | |:---|:---| | `thumbv7a-none-eabi` | `armv7a-none-eabi` | | `thumbv7a-none-eabihf` | `armv7a-none-eabihf` | | `thumbv7r-none-eabi` | `armv7r-none-eabi` | | `thumbv7r-none-eabihf` | `armv7r-none-eabihf` | | `thumbv8r-none-eabihf` | `armv8r-none-eabihf` | Note: There is no `thumbv8r-none-eabi` target because the Cortex-R52 processor always includes an FPU, making a soft-float ABI variant unnecessary. These Thumb-mode targets generate T32 code by default while their Arm-mode counterparts generate A32 code. They share the same LLVM backend, ABI, and data layout — the only spec differences are the `llvm_target` string and the description. See rust-lang/compiler-team#985

petrochenkov · 2026-06-03T06:28:22Z

Thanks!
@bors r+

rust-bors · 2026-06-03T06:28:24Z

📌 Commit e3468ae has been approved by petrochenkov

It is now in the queue for this repository.

🌲 The tree is currently closed for pull requests below priority 5. This pull request will be tested once the tree is reopened.

thejpster · 2026-06-03T06:39:22Z

Picking the same options as the existing Arm mode targets sounds right to me. You could build the targets and do a run of the rust-embedded/aarch32 suite to check, as it does a little bit of float maths.

…=petrochenkov Promotes 5 Thumb-mode bare-metal Arm targets to Tier 2 This PR promotes five Thumb-mode bare-metal Arm targets to Tier 2, joining their Arm-mode counterparts which are already Tier 2: | Thumb-mode target (Tier 3 → Tier 2) | Arm-mode counterpart (already Tier 2) | |:---|:---| | `thumbv7a-none-eabi` | `armv7a-none-eabi` | | `thumbv7a-none-eabihf` | `armv7a-none-eabihf` | | `thumbv7r-none-eabi` | `armv7r-none-eabi` | | `thumbv7r-none-eabihf` | `armv7r-none-eabihf` | | `thumbv8r-none-eabihf` | `armv8r-none-eabihf` | Note: There is no `thumbv8r-none-eabi` target because the Cortex-R52 processor always includes an FPU, making a soft-float ABI variant unnecessary. These Thumb-mode targets generate T32 code by default while their Arm-mode counterparts generate A32 code. They share the same LLVM backend, ABI, and data layout — the only spec differences are the `llvm_target` string and the description. See rust-lang/compiler-team#985

Rollup of 7 pull requests Successful merges: - #155763 (Promotes 5 Thumb-mode bare-metal Arm targets to Tier 2) - #156928 (Remove -Zemscripten-wasm-eh) - #157236 (Reorganize `tests/ui/issues` [3/N]) - #157294 (Split coroutine layout computation to its own file) - #157328 (windows: Elide division-by-zero checks in Instant::now()) - #157331 (Rewrite target checking for `#[link]`) - #157336 (Enable `clippy::mem_replace_with_default`)

rust-bors · 2026-06-03T09:26:57Z

⌛ Testing commit e3468ae with merge e8def2b...

Workflow: https://github.com/rust-lang/rust/actions/runs/26875909522

Promotes 5 Thumb-mode bare-metal Arm targets to Tier 2 This PR promotes five Thumb-mode bare-metal Arm targets to Tier 2, joining their Arm-mode counterparts which are already Tier 2: | Thumb-mode target (Tier 3 → Tier 2) | Arm-mode counterpart (already Tier 2) | |:---|:---| | `thumbv7a-none-eabi` | `armv7a-none-eabi` | | `thumbv7a-none-eabihf` | `armv7a-none-eabihf` | | `thumbv7r-none-eabi` | `armv7r-none-eabi` | | `thumbv7r-none-eabihf` | `armv7r-none-eabihf` | | `thumbv8r-none-eabihf` | `armv8r-none-eabihf` | Note: There is no `thumbv8r-none-eabi` target because the Cortex-R52 processor always includes an FPU, making a soft-float ABI variant unnecessary. These Thumb-mode targets generate T32 code by default while their Arm-mode counterparts generate A32 code. They share the same LLVM backend, ABI, and data layout — the only spec differences are the `llvm_target` string and the description. See rust-lang/compiler-team#985

JonathanBrouwer · 2026-06-03T09:28:53Z

@bors yield

rust-bors · 2026-06-03T09:28:56Z

Auto build was cancelled. Cancelled workflows:

https://github.com/rust-lang/rust/actions/runs/26875909522

The next pull request likely to be tested is #157349.

…=petrochenkov Promotes 5 Thumb-mode bare-metal Arm targets to Tier 2 This PR promotes five Thumb-mode bare-metal Arm targets to Tier 2, joining their Arm-mode counterparts which are already Tier 2: | Thumb-mode target (Tier 3 → Tier 2) | Arm-mode counterpart (already Tier 2) | |:---|:---| | `thumbv7a-none-eabi` | `armv7a-none-eabi` | | `thumbv7a-none-eabihf` | `armv7a-none-eabihf` | | `thumbv7r-none-eabi` | `armv7r-none-eabi` | | `thumbv7r-none-eabihf` | `armv7r-none-eabihf` | | `thumbv8r-none-eabihf` | `armv8r-none-eabihf` | Note: There is no `thumbv8r-none-eabi` target because the Cortex-R52 processor always includes an FPU, making a soft-float ABI variant unnecessary. These Thumb-mode targets generate T32 code by default while their Arm-mode counterparts generate A32 code. They share the same LLVM backend, ABI, and data layout — the only spec differences are the `llvm_target` string and the description. See rust-lang/compiler-team#985

…uwer Rollup of 15 pull requests Successful merges: - #155763 (Promotes 5 Thumb-mode bare-metal Arm targets to Tier 2) - #156953 (delegation: emit error when there is an infer lifetime in user-specified args) - #157248 (delegation: move statements out of the first arg) - #157263 (rustc_codegen_ssa: Refactor `ArchiveEntry` to include entry kind) - #157311 (Use weak linkage for EII defaults) - #156089 (Fix unused_parens for pinned reference patterns) - #156928 (Remove -Zemscripten-wasm-eh) - #157236 (Reorganize `tests/ui/issues` [3/N]) - #157287 (Const generics: remove AliasTerm::kind(), and small fixes) - #157294 (Split coroutine layout computation to its own file) - #157328 (windows: Elide division-by-zero checks in Instant::now()) - #157331 (Rewrite target checking for `#[link]`) - #157336 (Enable `clippy::mem_replace_with_default`) - #157362 (Fix trivial wf module argument/doc comment name mismatches) - #157364 (Rewrite target checking of `rustc_dummy`) Failed merges: - #157332 (Rewrite target checking for `#[sanitize]`)

Rollup merge of #155763 - cezarbbb:promote-thumb-to-tier2, r=petrochenkov Promotes 5 Thumb-mode bare-metal Arm targets to Tier 2 This PR promotes five Thumb-mode bare-metal Arm targets to Tier 2, joining their Arm-mode counterparts which are already Tier 2: | Thumb-mode target (Tier 3 → Tier 2) | Arm-mode counterpart (already Tier 2) | |:---|:---| | `thumbv7a-none-eabi` | `armv7a-none-eabi` | | `thumbv7a-none-eabihf` | `armv7a-none-eabihf` | | `thumbv7r-none-eabi` | `armv7r-none-eabi` | | `thumbv7r-none-eabihf` | `armv7r-none-eabihf` | | `thumbv8r-none-eabihf` | `armv8r-none-eabihf` | Note: There is no `thumbv8r-none-eabi` target because the Cortex-R52 processor always includes an FPU, making a soft-float ABI variant unnecessary. These Thumb-mode targets generate T32 code by default while their Arm-mode counterparts generate A32 code. They share the same LLVM backend, ABI, and data layout — the only spec differences are the `llvm_target` string and the description. See rust-lang/compiler-team#985

jonathanpallant · 2026-06-04T08:48:40Z

New rustup targets seem to run the aarch32 test suite without issue (rust-embedded/aarch32#174).

…uwer Rollup of 15 pull requests Successful merges: - rust-lang/rust#155763 (Promotes 5 Thumb-mode bare-metal Arm targets to Tier 2) - rust-lang/rust#156953 (delegation: emit error when there is an infer lifetime in user-specified args) - rust-lang/rust#157248 (delegation: move statements out of the first arg) - rust-lang/rust#157263 (rustc_codegen_ssa: Refactor `ArchiveEntry` to include entry kind) - rust-lang/rust#157311 (Use weak linkage for EII defaults) - rust-lang/rust#156089 (Fix unused_parens for pinned reference patterns) - rust-lang/rust#156928 (Remove -Zemscripten-wasm-eh) - rust-lang/rust#157236 (Reorganize `tests/ui/issues` [3/N]) - rust-lang/rust#157287 (Const generics: remove AliasTerm::kind(), and small fixes) - rust-lang/rust#157294 (Split coroutine layout computation to its own file) - rust-lang/rust#157328 (windows: Elide division-by-zero checks in Instant::now()) - rust-lang/rust#157331 (Rewrite target checking for `#[link]`) - rust-lang/rust#157336 (Enable `clippy::mem_replace_with_default`) - rust-lang/rust#157362 (Fix trivial wf module argument/doc comment name mismatches) - rust-lang/rust#157364 (Rewrite target checking of `rustc_dummy`) Failed merges: - rust-lang/rust#157332 (Rewrite target checking for `#[sanitize]`)

This MR contains the following updates: | Package | Type | Update | Change | |---|---|---|---| | [rust](https://github.com/rust-lang/rust) | tools | minor | `1.97.1` → `1.98.0` | MR created with the help of [el-capitano/tools/renovate-bot](https://gitlab.com/el-capitano/tools/renovate-bot). **Proposed changes to behavior should be submitted there as MRs.** --- ### Release Notes <details> <summary>rust-lang/rust (rust)</summary> ### [`v1.98.0`](https://github.com/rust-lang/rust/blob/HEAD/RELEASES.md#Version-1980-2026-08-20) [Compare Source](rust-lang/rust@1.97.1...1.98.0) \========================== <a id="1.98.0-Language"></a> ## Language - [Allow shortening lifetime of `&mut` when unsize-coercing, even in an invariant position.](rust-lang/rust#149219) For example, you can now coerce a `Cell<&'long mut i32>` to a `Cell<&'short mut dyn Send>`. Such shortenings were already previously allowed when coercing a `&mut` to a `&`, or coercing a `&` to a `&`. - [Add deny-by-default `invalid_runtime_symbol_definitions` lint and warn-by-default `suspicious_runtime_symbol_definitions` lint](rust-lang/rust#155521) - The lints currently specifically targets `core` runtime symbols like `memcmp`, `memset`, `strlen`, ... and is planned to be expanded in the next few releases. - [Add warn-by-default `c_void_returns` lint to check `core::ffi::c_void` as a return type](rust-lang/rust#156379) <a id="1.98.0-Platform-Support"></a> ## Platform Support - [Add `powerpc64-unknown-linux-gnuelfv2` as Tier 3](rust-lang/rust#144220) - [Add `aarch64-unknown-linux-pauthtest` as Tier 3 target](rust-lang/rust#155722) - [Promote `thumbv7a-none-eabi` to Tier 2](rust-lang/rust#155763) - [Promote `thumbv7a-none-eabihf` to Tier 2](rust-lang/rust#155763) - [Promote `thumbv7r-none-eabi` to Tier 2](rust-lang/rust#155763) - [Promote `thumbv7r-none-eabihf` to Tier 2](rust-lang/rust#155763) - [Promote `thumbv8r-none-eabihf` to Tier 2](rust-lang/rust#155763) Refer to Rust's [platform support page][platform-support-doc] for more information on Rust's tiered platform support. [platform-support-doc]: https://doc.rust-lang.org/rustc/platform-support.html <a id="1.98.0-Libraries"></a> ## Libraries - [Change `Location<'_>` lifetime to `'static` in `Panic[Hook]Info`](rust-lang/rust#146561) - [Document panic in `RangeInclusive::from(legacy::RangeInclusive)`](rust-lang/rust#155421) - [Document that `ManuallyDrop`'s `Box` interaction has been fixed](rust-lang/rust#155750) - [Stabilize LoongArch CRC Intrinsics](rust-lang/rust#156908) - [The `derive` macro is available at `{core,std}::derive`.](rust-lang/rust#154645) This was previously [unintentionally stabilized in 1.96](rust-lang/rust#159856), but is now [explicitly accepted](rust-lang/rust#154645) as a stabilized API. - Please note that the MSRV for `{core,std}::derive` will be 1.96, and not 1.98. <a id="1.98.0-Stabilized-APIs"></a> ## Stabilized APIs - [`str::substr_range`](https://doc.rust-lang.org/stable/std/primitive.str.html#method.substr_range) - [`[T]::subslice_range`](https://doc.rust-lang.org/stable/std/primitive.slice.html#method.subslice_range) - [`core::fmt::NumBuffer`](https://doc.rust-lang.org/stable/core/fmt/struct.NumBuffer.html) - [`<{integer}>::format_into`](https://doc.rust-lang.org/stable/core/primitive.usize.html#method.format_into) - [`Send/Sync for std::process::CommandArgs`](https://doc.rust-lang.org/stable/std/process/struct.CommandArgs.html#impl-Send-for-CommandArgs%3C'a%3E) - [`{fN}::algebraic_add`](https://doc.rust-lang.org/stable/core/primitive.f32.html#method.algebraic_add) - [`{fN}::algebraic_sub`](https://doc.rust-lang.org/stable/core/primitive.f32.html#method.algebraic_sub) - [`{fN}::algebraic_mul`](https://doc.rust-lang.org/stable/core/primitive.f32.html#method.algebraic_mul) - [`{fN}::algebraic_div`](https://doc.rust-lang.org/stable/core/primitive.f32.html#method.algebraic_div) - [`{fN}::algebraic_rem`](https://doc.rust-lang.org/stable/core/primitive.f32.html#method.algebraic_rem) - [`NonZero<{integer}>::from_str_radix`](https://doc.rust-lang.org/stable/core/num/struct.NonZero.html#method.from_str_radix-4) - [`String::from_utf16le`](https://doc.rust-lang.org/stable/std/string/struct.String.html#method.from_utf16le) - [`String::from_utf16le_lossy`](https://doc.rust-lang.org/stable/std/string/struct.String.html#method.from_utf16le_lossy) - [`String::from_utf16be`](https://doc.rust-lang.org/stable/std/string/struct.String.html#method.from_utf16be) - [`String::from_utf16be_lossy`](https://doc.rust-lang.org/stable/std/string/struct.String.html#method.from_utf16be_lossy) - [`[T]::strip_circumfix`](https://doc.rust-lang.org/stable/core/primitive.slice.html#method.strip_circumfix) - [`str::strip_circumfix`](https://doc.rust-lang.org/stable/core/primitive.str.html#method.strip_circumfix) - [`Atomic<T>::from_mut`](https://doc.rust-lang.org/stable/core/sync/atomic/struct.Atomic.html#method.from_mut) - [`Atomic<T>::get_mut_slice`](https://doc.rust-lang.org/stable/core/sync/atomic/struct.Atomic.html#method.get_mut_slice) - [`Atomic<T>::from_mut_slice`](https://doc.rust-lang.org/stable/core/sync/atomic/struct.Atomic.html#method.from_mut_slice) - [`std::range::legacy`](https://doc.rust-lang.org/stable/std/range/legacy/index.html) <a id="1.98.0-Compatibility-Notes"></a> ## Compatibility Notes - [If fully elided, lifetime bounds of trait object types may now resolve differently or even get rejected in very specific niche scenarios](rust-lang/rust#129543) - [Error in more cases of ambiguous imports](rust-lang/rust#145108) - [Switch the destructors implementation for thread locals on Windows to use Fiber Local Storage (FLS)](rust-lang/rust#148799) - [Convert some cases of the `ambiguous_glob_imports` lint into a hard error](rust-lang/rust#149195) - [Where-bounds of the form `Type = Type` and `Type == Type` are no longer syntactically allowed](rust-lang/rust#153513) - [Ensure Send/Sync is not implemented for std::env::Vars{,Os}](rust-lang/rust#155153) - [Fix that in some attributes, arguments were not properly rejected](rust-lang/rust#155193) - [`repr(transparent)` is now more strict about which fields have "trivial" layout and hence can be ignored: `repr(C)` types, types with private fields, and `#[non_exhaustive]` types are no longer considered "trivial"](rust-lang/rust#155299) - [Correctly check whether types have equal size in `transmute()` when some `repr` attributes are involved.](rust-lang/rust#155418) - [More characters are escaped when printing strings and chars](rust-lang/rust#155527) - [Implement fast path for `derive(PartialOrd)` when deriving `Ord`](rust-lang/rust#155598) This can break crates in practice where a type's PartialOrd and Ord impls were inconsistent with each other. - [Add temporary scope to `assert_eq` and `assert_ne`](rust-lang/rust#155739) - Closed a hole in the pattern matching [structural equality](https://doc.rust-lang.org/reference/patterns.html#constant-patterns) check, preventing cases where a match of a constant would be allowed, despite disagreeing with a manually written `PartialEq` implementation, when a `derive(PartialEq)` implementation for that type also exists. - [On Emscripten the WASM exception handling ABI is now unconditionally used](rust-lang/rust#156928) The `-Zemscripten-wasm-eh=false` flag to switch back to JS exceptions has been removed. - [The UNSAFE\_CODE lint is now consistently emitted for all unsafe attributes](rust-lang/rust#157201) - [Solaris: remove `File::lock` implementation, it has the wrong semantics (return "unsupported" instead)](rust-lang/rust#157509) - [Windows-gnu targets now specify baseline tools versions](rust-lang/rust#158020) - [rustfmt now discovers module files that are defined in `cfg_select!`](rust-lang/rust#158372) This may cause more code to be formatted which was previously ignored. </details> --- ### Configuration 📅 **Schedule**: (UTC) - Branch creation - At any time (no schedule defined) - Automerge - At any time (no schedule defined) 🚦 **Automerge**: Disabled by config. Please merge this manually once you are satisfied. ♻ **Rebasing**: Whenever MR becomes conflicted, or you tick the rebase/retry checkbox. 🔕 **Ignore**: Close this MR and you won't be reminded about this update again. --- - [ ] If you want to rebase/retry this MR, check this box --- This MR has been generated by [Mend Renovate](https://github.com/renovatebot/renovate).

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Promotes 5 Thumb-mode bare-metal Arm targets to Tier 2 rust-lang/compiler-team#985

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Rollup of 10 pull requests #157246

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New thumb targets at Tier 2 rust-embedded/aarch32#172

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Tracking issue for release notes of #155763: Promotes 5 Thumb-mode bare-metal Arm targets to Tier 2 #160688

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Draft release notes for 1.98.0 #160700

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