chore(u3): update to latest STM32CubeU3 v1.4.0

cores/arduino/stm32/stm32_def_build.h

@@ -454,6 +454,10 @@
     #define CMSIS_STARTUP_FILE "startup_stm32u073xx.s"
   #elif defined(STM32U083xx)
     #define CMSIS_STARTUP_FILE "startup_stm32u083xx.s"
+  #elif defined(STM32U335xx)
+    #define CMSIS_STARTUP_FILE "startup_stm32u335xx.s"
+  #elif defined(STM32U345xx)
+    #define CMSIS_STARTUP_FILE "startup_stm32u345xx.s"
   #elif defined(STM32U356xx)
     #define CMSIS_STARTUP_FILE "startup_stm32u356xx.s"
   #elif defined(STM32U366xx)

system/Drivers/CMSIS/Device/ST/STM32U3xx/Include/partition_stm32u3xx.h

@@ -41,14 +41,26 @@
 /** @addtogroup Secure_configuration_section
   * @{
   */
-#if defined(STM32U375xx)
+#if defined(STM32U356xx)
+  #include "partition_stm32u356xx.h"
+#elif defined(STM32U366xx)
+  #include "partition_stm32u366xx.h"
+#elif defined(STM32U396xx)
+  #include "partition_stm32u396xx.h"
+#elif defined(STM32U3A6xx)
+  #include "partition_stm32u3a6xx.h"
+#elif defined(STM32U375xx)
   #include "partition_stm32u375xx.h"
 #elif defined(STM32U385xx)
   #include "partition_stm32u385xx.h"
 #elif defined(STM32U3B5xx)
   #include "partition_stm32u3b5xx.h"
 #elif defined(STM32U3C5xx)
   #include "partition_stm32u3c5xx.h"
+#elif defined(STM32U335xx)
+  #include "partition_stm32u335xx.h"
+#elif defined(STM32U345xx)
+  #include "partition_stm32u345xx.h"
 #else
   #error "Please select first the target STM32U3xx device used in your application (in stm32u3xx.h file)"
 #endif

system/Drivers/CMSIS/Device/ST/STM32U3xx/Include/stm32u3xx.h

@@ -56,11 +56,13 @@
    application
   */
 
-#if !defined (STM32U375xx)  && !defined (STM32U385xx) && !defined (STM32U3B5xx)  && !defined (STM32U3C5xx)
+#if !defined (STM32U375xx)  && !defined (STM32U385xx) && !defined (STM32U3B5xx)  && !defined (STM32U3C5xx) && !defined (STM32U345xx)  && !defined (STM32U335xx)
   /* #define STM32U375xx  */   /*!< STM32U37xx STM32U375EFGH Devices  */
   /* #define STM32U385xx  */   /*!< STM32U38xx STM32U385EFGH Devices  */
-  /* #define STM32U3B5xx  */   /*!< STM32UB5xx STM32U3B5EFGH Devices  */
-  /* #define STM32U3C5xx  */   /*!< STM32UC5xx STM32U3C5EFGH Devices  */
+  /* #define STM32U3B5xx  */   /*!< STM32U37xx STM32U3B5EFGH Devices  */
+  /* #define STM32U3C5xx  */   /*!< STM32U38xx STM32U3C5EFGH Devices  */
+  /* #define STM32U345xx  */   /*!< STM32U37xx STM32U345EFGH Devices  */
+  /* #define STM32U335xx  */   /*!< STM32U38xx STM32U335EFGH Devices  */
 #endif
 
 /*  Tip: To avoid modifying this file each time you need to switch between these
@@ -79,7 +81,7 @@
   * @brief CMSIS Device version number
   */
 #define __STM32U3_CMSIS_VERSION_MAIN   (0x01U) /*!< [31:24] main version */
-#define __STM32U3_CMSIS_VERSION_SUB1   (0x03U) /*!< [23:16] sub1 version */
+#define __STM32U3_CMSIS_VERSION_SUB1   (0x04U) /*!< [23:16] sub1 version */
 #define __STM32U3_CMSIS_VERSION_SUB2   (0x00U) /*!< [15:8]  sub2 version */
 #define __STM32U3_CMSIS_VERSION_RC     (0x00U) /*!< [7:0]  release candidate */
 #define __STM32U3_CMSIS_VERSION        ((__STM32U3_CMSIS_VERSION_MAIN << 24U)\
@@ -94,7 +96,19 @@
 /** @addtogroup Device_Included
   * @{
   */
-#if defined(STM32U375xx)
+#if defined(STM32U335xx)
+  #include "stm32u335xx.h"
+#elif defined(STM32U345xx)
+  #include "stm32u345xx.h"
+#elif defined(STM32U356xx)
+  #include "stm32u356xx.h"
+#elif defined(STM32U366xx)
+  #include "stm32u366xx.h"
+#elif defined(STM32U396xx)
+  #include "stm32u396xx.h"
+#elif defined(STM32U3A6xx)
+  #include "stm32u3a6xx.h"
+#elif defined(STM32U375xx)
   #include "stm32u375xx.h"
 #elif defined(STM32U385xx)
   #include "stm32u385xx.h"

system/Drivers/CMSIS/Device/ST/STM32U3xx/LICENSE.md

@@ -198,4 +198,4 @@
    distributed under the License is distributed on an "AS IS" BASIS,
    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
    See the License for the specific language governing permissions and
-   limitations under the License.
+   limitations under the License.

system/Drivers/CMSIS/Device/ST/STM32U3xx/README.md

@@ -1,6 +1,6 @@
 # STM32CubeU3 CMSIS Device MCU Component
 
-![tag](https://img.shields.io/badge/tag-v1.3.0-brightgreen.svg)
+![tag](https://img.shields.io/badge/tag-v1.4.0-brightgreen.svg)
 
 ## Overview
 
@@ -36,4 +36,4 @@ The full **STM32CubeU3** MCU package is available [here](https://github.com/STMi
 
 ## Troubleshooting
 
-Please refer to the [CONTRIBUTING.md](CONTRIBUTING.md) guide.
+Please refer to the [CONTRIBUTING.md](CONTRIBUTING.md) guide.

system/Drivers/CMSIS/Device/ST/STM32U3xx/Release_Notes.html

@@ -43,15 +43,37 @@ <h1 id="purpose">Purpose</h1>
 <div class="col-sm-12 col-lg-8">
 <h1 id="update-history">Update history</h1>
 <div class="collapse">
-<input type="checkbox" id="collapse-section4" checked aria-hidden="true"> <label for="collapse-section4" aria-hidden="true"> <strong>V1.3.0 / 04-February-2026</strong> </label>
+<input type="checkbox" id="collapse-section5" checked aria-hidden="true"> <label for="collapse-section5" aria-hidden="true"> <strong>V1.4.0 / 03-June-2026</strong> </label>
 <div>
 <h2 id="official-release">Official Release</h2>
 <ul>
-<li>Official release of CMSIS for <strong>STM32U3xx</strong> firmware package supporting <strong>STM32U385xx/STM32U375xx/STM32U3B5xx/STM32U3C5xx</strong> devices</li>
+<li>Official release of CMSIS for <strong>STM32U3xx</strong> firmware package supporting <strong>STM32U335xx/STM32U345xx/STM32U356xx/STM32U366xx/STM32U375xx/STM32U385xx/STM32U3B5xx/STM32U3C5xx</strong> devices</li>
 <li>CMSIS Device Release version of bits and registers definition aligned with <strong>RM0487</strong></li>
 </ul>
 <h2 id="contents">Contents</h2>
 <ul>
+<li>First official release of STM32U335xx/STM32U345xx/STM32U356xx/STM32U366xx</li>
+<li>Update registers and bit definition for all derivatives after last update of RNG4.4.</li>
+<li>Created startup and Linker files of STM32U3 256K for CubeIDE</li>
+<li>Add ADC1 security bit for U3 256K variants</li>
+<li>Enable CCB HW sanity check on more U3 variants</li>
+</ul>
+<h2 id="known-limitations">Known Limitations</h2>
+<ul>
+<li>None</li>
+</ul>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="true"> <strong>V1.3.0 / 04-February-2026</strong> </label>
+<div>
+<h2 id="official-release-1">Official Release</h2>
+<ul>
+<li>Official release of CMSIS for <strong>STM32U3xx</strong> firmware package supporting <strong>STM32U385xx/STM32U375xx/STM32U3B5xx/STM32U3C5xx</strong> devices</li>
+<li>CMSIS Device Release version of bits and registers definition aligned with <strong>RM0487</strong></li>
+</ul>
+<h2 id="contents-1">Contents</h2>
+<ul>
 <li>First official release of STM32U3B5xx/STM32U3C5xx</li>
 <li>Add COMP2 output-blanking PWM assignment</li>
 <li>Fix Missing OR operator in IS_TIM_CCXN_INSTANCE definition</li>
@@ -76,7 +98,7 @@ <h2 id="contents">Contents</h2>
 <li>Add SPI4 instance for STM32U3 2M</li>
 <li>Update FLASH linker files with correct flash size</li>
 </ul>
-<h2 id="known-limitations">Known Limitations</h2>
+<h2 id="known-limitations-1">Known Limitations</h2>
 <ul>
 <li>None</li>
 </ul>
@@ -89,13 +111,13 @@ <h2 id="maintenance-release">Maintenance Release</h2>
 <ul>
 <li>Maintenance release of CMSIS for <strong>STM32U3xx</strong> firmware package supporting <strong>STM32U385xx/STM32U375xx</strong> devices</li>
 </ul>
-<h2 id="contents-1">Contents</h2>
+<h2 id="contents-2">Contents</h2>
 <ul>
 <li>Add PKA on STM32U375xx</li>
 <li>Add CCB sanity check feature on STM32U385xx</li>
 <li>Swap bit position FLASH MEM and FLASH REG in GTZC1 TZIC registers</li>
 </ul>
-<h2 id="known-limitations-1">Known Limitations</h2>
+<h2 id="known-limitations-2">Known Limitations</h2>
 <ul>
 <li>None</li>
 </ul>
@@ -108,13 +130,13 @@ <h2 id="maintenance-release-1">Maintenance Release</h2>
 <ul>
 <li>Maintenance release of CMSIS for <strong>STM32U3xx</strong> firmware package supporting <strong>STM32U385xx/STM32U375xx</strong> devices</li>
 </ul>
-<h2 id="contents-2">Contents</h2>
+<h2 id="contents-3">Contents</h2>
 <ul>
 <li>Fix PWR_I3CPUCR2_PG14_I3CPU_Pos value</li>
 <li>Suppress unused bit</li>
 <li>Minor fix on comments</li>
 </ul>
-<h2 id="known-limitations-2">Known Limitations</h2>
+<h2 id="known-limitations-3">Known Limitations</h2>
 <ul>
 <li>None</li>
 </ul>
@@ -127,14 +149,14 @@ <h2 id="first-release">First Release</h2>
 <ul>
 <li>First official release of CMSIS for <strong>STM32U3xx</strong> firmware package supporting <strong>STM32U385xx/STM32U375xx</strong> devices</li>
 </ul>
-<h2 id="contents-3">Contents</h2>
+<h2 id="contents-4">Contents</h2>
 <ul>
 <li>First official release of CMSIS devices drivers
 <ul>
 <li>Support of STM32U385xx/STM32U375xx devices</li>
 </ul></li>
 </ul>
-<h2 id="known-limitations-3">Known Limitations</h2>
+<h2 id="known-limitations-4">Known Limitations</h2>
 <ul>
 <li>None</li>
 </ul>

system/Drivers/CMSIS/Device/ST/STM32U3xx/Release_Notes.md

@@ -0,0 +1,142 @@
+
+
+# Release Notes for <mark>STM32U3xx CMSIS</mark>
+Copyright &copy; 2024 - 2026 STMicroelectronics\
+
+[![ST logo](_htmresc/st_logo_2020.png)](https://www.st.com)
+
+# Purpose
+
+This driver provides the CMSIS device for the STM32U3xx product. This covers
+
+- STM32U375xx devices
+- STM32U385xx devices
+
+This driver is composed of the description of the registers under "Include" directory.
+
+Various template files are provided to easily build an application. They can be adapted to fit applications requirements.
+
+- Templates/system_stm32u3xx.c contains the initialization code referred as SystemInit.
+- Startup files are provided as example for EWARM&copy;, MDK-ARM&copy;, STM32CubeIDE&copy;.
+- Linker files are provided as example for EWARM&copy;, MDK-ARM&copy;, STM32CubeIDE&copy;.
+
+
+
+# Update history
+
+<label for="collapse-section5" aria-hidden="true"> __V1.4.0 / 03-June-2026__ </label>
+<div>
+
+## Official Release
+
+- Official release of CMSIS for **STM32U3xx** firmware package supporting **STM32U335xx/STM32U345xx/STM32U356xx/STM32U366xx/STM32U375xx/STM32U385xx/STM32U3B5xx/STM32U3C5xx** devices
+- CMSIS Device Release version of bits and registers definition aligned with **RM0487**
+
+## Contents
+- First official release of STM32U335xx/STM32U345xx/STM32U356xx/STM32U366xx
+- Update registers and bit definition for all derivatives after last update of RNG4.4.
+- Created startup and Linker files of STM32U3 256K for CubeIDE
+- Add ADC1 security bit for U3 256K variants
+- Enable CCB HW sanity check on more U3 variants
+
+## Known Limitations
+
+- None
+
+</div>
+
+<label for="collapse-section4" aria-hidden="true"> __V1.3.0 / 04-February-2026__ </label>
+<div>
+
+## Official Release
+
+- Official release of CMSIS for **STM32U3xx** firmware package supporting **STM32U385xx/STM32U375xx/STM32U3B5xx/STM32U3C5xx** devices
+- CMSIS Device Release version of bits and registers definition aligned with **RM0487**
+
+## Contents
+- First official release of STM32U3B5xx/STM32U3C5xx
+- Add COMP2 output-blanking PWM assignment
+- Fix Missing OR operator in IS_TIM_CCXN_INSTANCE definition
+- Set stack limit (MSPLIM) in CMSIS Device templates
+- Remove "__section_static_hsp_data_bram_start__" & "__section_static_hsp_data_bram_end__" useless symbols
+- Fix wrong memory region for HSP_DATA_BRAM
+- Add missing bit fields in flash
+- Update scatter file with correct flash size
+- Add Begin/End symbols for HSP_DATA_BRAM memory region
+- Add clock defaults to system file
+- Add/Update TSC registers for U3 derivatives
+- Add/Update DBGMCU registers
+- Add SYSCFG_CFGR1_TSC_G2_IO3 and SYSCFG_CFGR1_TSC_G2_IO1 bit definitions in SYSCFG_CFGR1
+- Fix wrong macro value for VREFBUF_CSR_VRS_2
+- Update TIM8 IRQ Handler name and remove unused AES IRQ handler
+- Add I2C4 macros for STM32U3 2M
+- Rename "HSP_BKO0CFGR_xxxx" constants by "HSP_BKOCFGR_xxxx"
+- Fix wrong macro HSPI1 to HSP1 in DBGMCU_AHB1FZR_DBG_HSP1
+- CMSIS update removing ADC DIFSEL register
+- Fix MPCBB registers for SRAM3
+- CMSIS correction for TIM8_S Definition
+- Add SPI4 instance for STM32U3 2M
+- Update FLASH linker files with correct flash size
+
+## Known Limitations
+
+- None
+
+</div>
+
+<label for="collapse-section3" aria-hidden="true"> __V1.2.0 / 04-June-2025__ </label>
+<div>
+
+## Maintenance Release
+
+- Maintenance release of CMSIS for **STM32U3xx** firmware package supporting **STM32U385xx/STM32U375xx** devices
+
+## Contents
+- Add PKA on STM32U375xx
+- Add CCB sanity check feature on STM32U385xx
+- Swap bit position FLASH MEM and FLASH REG in GTZC1 TZIC registers
+
+## Known Limitations
+
+- None
+
+</div>
+
+<label for="collapse-section2" aria-hidden="true"> __V1.1.0 / 05-February-2025__ </label>
+<div>
+
+## Maintenance Release
+
+- Maintenance release of CMSIS for **STM32U3xx** firmware package supporting **STM32U385xx/STM32U375xx** devices
+
+## Contents
+- Fix PWR_I3CPUCR2_PG14_I3CPU_Pos value
+- Suppress unused bit
+- Minor fix on comments
+
+## Known Limitations
+
+- None
+
+</div>
+
+<label for="collapse-section1" aria-hidden="true"> __V1.0.0 / 30-October-2024__ </label>
+<div>
+
+## First Release
+
+- First official release of CMSIS for **STM32U3xx** firmware package supporting **STM32U385xx/STM32U375xx** devices
+
+## Contents
+
+- First official release of CMSIS devices drivers
+  - Support of STM32U385xx/STM32U375xx devices
+
+## Known Limitations
+
+- None
+
+</div>
+
+
+<abbr title="Based on template cx566953 version 2.1">Info</abbr>