chore(wb0): update to latest STM32CubeWB0 v1.5.0

CI/update/patch/HAL/WB0/0001-fix-wb0-HAL-and-LL-warnings.patch

@@ -7,10 +7,8 @@ Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
 ---
  .../Inc/stm32wb0x_ll_dma.h                    | 40 +++++++++++++++++++
  .../Inc/stm32wb0x_ll_radio_timer.h            |  3 ++
- .../Src/stm32wb0x_hal_flash_ex.c              |  2 +-
  .../Src/stm32wb0x_hal_radio_timer.c           |  4 +-
- .../Src/stm32wb0x_ll_adc.c                    |  2 +-
- 5 files changed, 47 insertions(+), 4 deletions(-)
+ 3 files changed, 45 insertions(+), 2 deletions(-)
 
 diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_dma.h b/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_dma.h
 index bc237ac45..fff12f8c3 100644
@@ -23,15 +21,15 @@ index bc237ac45..fff12f8c3 100644
 +  (void)DMAx;
    SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_EN);
  }
- 
+
 @@ -450,6 +451,7 @@ __STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel)
    */
  __STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel)
  {
 +  (void)DMAx;
    CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_EN);
  }
- 
+
 @@ -470,6 +472,7 @@ __STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel)
    */
  __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel)
@@ -191,127 +189,127 @@ index bc237ac45..fff12f8c3 100644
 +  (void)DMAx;
    WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, MemoryAddress);
  }
- 
+
 @@ -985,6 +1007,7 @@ __STATIC_INLINE void LL_DMA_SetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel
    */
  __STATIC_INLINE void LL_DMA_SetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphAddress)
  {
 +  (void)DMAx;
    WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR, PeriphAddress);
  }
- 
+
 @@ -1006,6 +1029,7 @@ __STATIC_INLINE void LL_DMA_SetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel
    */
  __STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel)
  {
 +  (void)DMAx;
    return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR));
  }
- 
+
 @@ -1027,6 +1051,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Cha
    */
  __STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel)
  {
 +  (void)DMAx;
    return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR));
  }
- 
+
 @@ -1050,6 +1075,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Cha
    */
  __STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
  {
 +  (void)DMAx;
    WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR, MemoryAddress);
  }
- 
+
 @@ -1073,6 +1099,7 @@ __STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel
    */
  __STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
  {
 +  (void)DMAx;
    WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, MemoryAddress);
  }
- 
+
 @@ -1094,6 +1121,7 @@ __STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel
    */
  __STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel)
  {
 +  (void)DMAx;
    return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR));
  }
- 
+
 @@ -1115,6 +1143,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Cha
    */
  __STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel)
  {
 +  (void)DMAx;
    return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR));
  }
- 
+
 @@ -1137,6 +1166,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Cha
    */
  __STATIC_INLINE void LL_DMA_SetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Request)
  {
 +  (void)DMAx;
    MODIFY_REG(__LL_DMA_INSTANCE_TO_DMAMUX_CCR(DMAx, Channel - 1U)->CxCR, DMAMUX_CxCR_DMAREQ_ID, Request);
  }
- 
+
 @@ -1158,6 +1188,7 @@ __STATIC_INLINE void LL_DMA_SetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel
    */
  __STATIC_INLINE uint32_t LL_DMA_GetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel)
  {
 +  (void)DMAx;
    return (READ_BIT(__LL_DMA_INSTANCE_TO_DMAMUX_CCR(DMAx, Channel - 1U)->CxCR, DMAMUX_CxCR_DMAREQ_ID));
  }
- 
+
 @@ -1897,6 +1928,7 @@ __STATIC_INLINE void LL_DMA_ClearFlag_TE8(DMA_TypeDef *DMAx)
    */
  __STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
  {
 +  (void)DMAx;
    SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TCIE);
  }
- 
+
 @@ -1917,6 +1949,7 @@ __STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
    */
  __STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
  {
 +  (void)DMAx;
    SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_HTIE);
  }
- 
+
 @@ -1937,6 +1970,7 @@ __STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
    */
  __STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
  {
 +  (void)DMAx;
    SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TEIE);
  }
- 
+
 @@ -1957,6 +1991,7 @@ __STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
    */
  __STATIC_INLINE void LL_DMA_DisableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
  {
 +  (void)DMAx;
    CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TCIE);
  }
- 
+
 @@ -1977,6 +2012,7 @@ __STATIC_INLINE void LL_DMA_DisableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
    */
  __STATIC_INLINE void LL_DMA_DisableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
  {
 +  (void)DMAx;
    CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_HTIE);
  }
- 
+
 @@ -1997,6 +2033,7 @@ __STATIC_INLINE void LL_DMA_DisableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
    */
  __STATIC_INLINE void LL_DMA_DisableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
  {
 +  (void)DMAx;
    CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TEIE);
  }
- 
+
 @@ -2017,6 +2054,7 @@ __STATIC_INLINE void LL_DMA_DisableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
    */
  __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
@@ -357,26 +355,13 @@ index e3618cfc1..db5808c58 100644
    return 0;
  #else
    return (uint32_t)(READ_REG(WAKEUP->BLUE_SLEEP_REQUEST_MODE) & WAKEUP_BLUE_SLEEP_REQUEST_MODE_SLEEP_REQ_MODE);
-diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_flash_ex.c b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_flash_ex.c
-index fe66a0a89..6bded19a1 100644
---- a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_flash_ex.c
-+++ b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_flash_ex.c
-@@ -109,7 +109,7 @@ static void              FLASH_KeyWrite(void);
-   */
- HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
- {
--  HAL_StatusTypeDef status;
-+  HAL_StatusTypeDef status = HAL_ERROR;
-   uint32_t index;
-
-   /* Check the parameters */
 diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio_timer.c b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio_timer.c
 index 70219dc39..db269d88e 100644
 --- a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio_timer.c
 +++ b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio_timer.c
 @@ -1131,7 +1131,7 @@ static void _get_calibration_data(CalibrationDataTypeDef *calibrationData)
    int32_t a2;
- 
+
    period =  LL_RADIO_TIMER_GetLSIPeriod(RADIO_CTRL);
 -  while (period != LL_RADIO_TIMER_GetLSIPeriod(RADIO_CTRL) || period == 0)
 +  while (period != (int32_t)LL_RADIO_TIMER_GetLSIPeriod(RADIO_CTRL) || period == 0)
@@ -386,25 +371,12 @@ index 70219dc39..db269d88e 100644
 @@ -1145,7 +1145,7 @@ static void _get_calibration_data(CalibrationDataTypeDef *calibrationData)
    mult = 0x753 ;
    freq = LL_RADIO_TIMER_GetLSIFrequency(RADIO_CTRL);
- 
+
 -  while (freq != LL_RADIO_TIMER_GetLSIFrequency(RADIO_CTRL) || freq == 0)
 +  while (freq != (int32_t)LL_RADIO_TIMER_GetLSIFrequency(RADIO_CTRL) || freq == 0)
    {
      freq = LL_RADIO_TIMER_GetLSIFrequency(RADIO_CTRL);
    }
-diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_ll_adc.c b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_ll_adc.c
-index 5308d2980..c071750ba 100644
---- a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_ll_adc.c
-+++ b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_ll_adc.c
-@@ -24,7 +24,7 @@
- #ifdef  USE_FULL_ASSERT
- #include "stm32_assert.h"
- #else
--#define assert_param(expr) ((void)0UL)
-+#define assert_param(expr) ((void)0U)
- #endif /* USE_FULL_ASSERT */
-
- /** @addtogroup STM32WB0x_LL_Driver
--- 
+--
 2.34.1
 

system/Drivers/STM32WB0x_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h

@@ -363,7 +363,6 @@ extern "C" {
 #define DMA_REQUEST_DCMI_PSSI                    DMA_REQUEST_DCMI
 #elif defined(STM32L4P5xx) || defined(STM32L4Q5xx)
 #define DMA_REQUEST_PSSI                    DMA_REQUEST_DCMI_PSSI
-#define LL_DMAMUX_REQ_PSSI                  LL_DMAMUX_REQ_DCMI_PSSI
 #endif /* STM32L4R5xx || STM32L4R9xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
 
 #endif /* STM32L4 */
@@ -1918,7 +1917,11 @@ extern "C" {
 #define HAL_PWREx_DisableSDADCAnalog                  HAL_PWREx_DisableSDADC
 #define HAL_PWREx_EnableSDADCAnalog                   HAL_PWREx_EnableSDADC
 #define HAL_PWREx_PVMConfig                           HAL_PWREx_ConfigPVM
-
+#if defined(STM32G0C1xx) || defined(STM32G0B1xx)
+#define PWR_PVM_USB                                   PWR_PVM_ENABLE
+#define PWR_FLAG_PVMOUSB                              PWR_FLAG_PVMOVDDIO2
+#define PWR_FLAG_PVMO_USB                             PWR_FLAG_PVMO_VDDIO2
+#endif /* STM32G0C1xx || STM32G0B1xx */
 #define PWR_MODE_NORMAL                               PWR_PVD_MODE_NORMAL
 #define PWR_MODE_IT_RISING                            PWR_PVD_MODE_IT_RISING
 #define PWR_MODE_IT_FALLING                           PWR_PVD_MODE_IT_FALLING
@@ -2031,6 +2034,9 @@ extern "C" {
 
 #define PWR_ALL_RAM_RUN_RETENTION_MASK                PWR_ALL_RAM_RUN_MASK
 #endif
+#if defined (STM32H7RS)
+#define PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO             PWR_SMPS_1V8_SUPPLIES_EXT_VDD_SUPPLIES_LDO
+#endif
 
 /**
   * @}
@@ -2159,6 +2165,13 @@ extern "C" {
 #define HAL_GetFMCMemorySwappingConfig        HAL_FMC_GetBankSwapConfig
 #endif /* STM32H7RS || STM32N6 */
 
+#if defined(STM32N6)
+/* alias CMSIS */
+#define CSI_PCR_PWRDOWN_Pos             CSI_PCR_NPWRDOWN_Pos
+#define CSI_PCR_PWRDOWN_Msk             CSI_PCR_NPWRDOWN_Msk
+#define CSI_PCR_PWRDOWN                 CSI_PCR_NPWRDOWN
+#endif /* STM32N6 */
+
 /**
   * @}
   */

system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_hal.h

@@ -48,7 +48,7 @@ extern "C" {
   * @brief HAL Driver version number
    */
 #define __STM32WB0x_HAL_VERSION_MAIN   (0x01U) /*!< [31:24] main version */
-#define __STM32WB0x_HAL_VERSION_SUB1   (0x04U) /*!< [23:16] sub1 version */
+#define __STM32WB0x_HAL_VERSION_SUB1   (0x05U) /*!< [23:16] sub1 version */
 #define __STM32WB0x_HAL_VERSION_SUB2   (0x00U) /*!< [15:8]  sub2 version */
 #define __STM32WB0x_HAL_VERSION_RC     (0x00U) /*!< [7:0]  release candidate */
 #define __STM32WB0x_HAL_VERSION         ((__STM32WB0x_HAL_VERSION_MAIN << 24U)\

system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_hal_uart.h

@@ -1343,7 +1343,7 @@ typedef  void (*pUART_RxEventCallbackTypeDef)
   *         divided by the smallest oversampling used on the USART (i.e. 8)
   * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid)
   */
-#define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 2000001U)
+#define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 2000000U)
 
 /** @brief  Check UART assertion time.
   * @param  __TIME__ 5-bit value assertion time.

system/Drivers/STM32WB0x_HAL_Driver/LICENSE.md

@@ -24,4 +24,4 @@ ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

system/Drivers/STM32WB0x_HAL_Driver/README.md

@@ -1,6 +1,6 @@
 # STM32CubeWB0 HAL Driver MCU Component
 
-![latest tag](https://img.shields.io/github/v/tag/STMicroelectronics/stm32wb0x_hal_driver.svg?color=brightgreen)
+![tag](https://img.shields.io/badge/tag-v1.5.0-brightgreen.svg)
 
 ## Overview
 
@@ -33,4 +33,4 @@ The full **STM32CubeWB0** MCU package is available [here](https://github.com/STM
 
 ## Troubleshooting
 
-Please refer to the [CONTRIBUTING.md](CONTRIBUTING.md) guide.
+Please refer to the [CONTRIBUTING.md](CONTRIBUTING.md) guide.