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The turbo4/3/2 fused-MMA case launcher omitted the use_sparse argument to launch_fattn(), so warp_size_host (int 32) landed in the use_sparse bool slot and evaluated to true. With n_kv_max = 0 (op param 4) that trips GGML_ASSERT(n_kv_max > 0) in fattn-common.cuh during warmup decode. Mirror the f16 reference call, which passes use_sparse before warp_size_host.
flash_attn_ext_turbo4/3/2_load_tile wrote K/V tiles linearly (tile_KV[row*stride_tile + c]) while load_ldmatrix<..., swz=true> reads them through the XOR swizzle bytes_rc<stride_tile>(row, col). When swizzle is enabled (nbatch_2 >= 32 and a multiple of 32, e.g. head-dim 256 gives nbatch_K2=128) the un-swizzled write is permuted on read, scrambling attention and producing garbage. Add a bool swz template parameter and write through bytes_rc when swz is set, matching flash_attn_ext_f16_load_tile. Call sites pass swz_K / swz_V.
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Included review availability: Your plan provides up to 2 included reviews per hour; 1 remains after this review. 📝 WalkthroughWalkthroughChangesCUDA flash-attention integration
Priority: ➖ Normal Estimated code review effort: 2 (Simple) | ~10 minutes Change: Bug fix Suggested reviewers: Merge Risk: ⚪ Minimal · up to No actionable correctness risk remains from this change; the CUDA turbo swizzle and launcher updates are ready to merge. 🚥 Pre-merge checks | ✅ 4 | ❌ 1❌ Failed checks (1 warning)
✅ Passed checks (4 passed)
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Two independent bugs made the fused-MMA TurboQuant KV path (
-ctk/-ctv turbo4) unusable: it crashed on load, and after fixing the crash it produced garbage. Both are fixed here; the path is now correct and ~34% faster thanq8_0.Bug 1 — crash on load:
use_sparseomitted (off-by-one)ggml/src/ggml-cuda/fattn-mma-turbo.cuh: the singlelaunch_fattn(...)call omitted theuse_sparseargument, sowarp_size_host(int 32) landed in theuse_sparsebool slot and evaluated totrue. Withn_kv_max = 0(op param 4) that tripsGGML_ASSERT(n_kv_max > 0)infattn-common.cuhduring warmup decode.Fix: pass
/*use_sparse=*/falsebeforewarp_size_host, mirroring the f16 reference call (... stream_k, use_sparse, warp_size_host).Bug 2 — garbage output: missing SMEM swizzle in the turbo tile loaders
ggml/src/ggml-cuda/fattn-mma-f16.cuh:flash_attn_ext_turbo4/3/2_load_tilewrote K/V tiles linearly (tile_KV[row*stride_tile + c]) whileload_ldmatrix<..., swz=true>reads them through the XOR swizzlebytes_rc<stride_tile>(row, col). When swizzle is enabled (nbatch_2 >= 32 && nbatch_2 % 32 == 0, e.g. head-dim 256 ->nbatch_K2 = 128) the un-swizzled write is permuted on read, scrambling attention and producing garbage (the model misread "1724" as "1010").Fix: add a
bool swztemplate parameter and write throughbytes_rcwhen swz is set, matchingflash_attn_ext_f16_load_tile. Call sites passswz_K/swz_V.Result
On Ornith-1.5-35B-A3B (qwen35moe, head-dim 256, RTX 3080 Laptop 16 GB):
32.6 t/s for+34%), with ~0.9 GB less VRAMq8_0(Summary by CodeRabbit