Integrate latest UCIe commits

software/ring-hello.c

@@ -20,8 +20,10 @@ int main(void) {
 
   setup_ucie(UCIE0_REG_BASE);
   reg_write64(UCIE0_REG_BASE + UCIE_MAINBAND_MODE, UCIE_BAND_MODE_TL);
+  reset_datapath(UCIE0_REG_BASE);
   setup_ucie(UCIE1_REG_BASE);
   reg_write64(UCIE1_REG_BASE + UCIE_MAINBAND_MODE, UCIE_BAND_MODE_TL);
+  reset_datapath(UCIE1_REG_BASE);
 
   int next = (chip_id % 4) + 1;
   int prev = ((chip_id + 2) % 4) + 1;

software/router.c

@@ -50,13 +50,15 @@ int main(void) {
   if (chip_id == 1) {
     setup_ucie(UCIE0_REG_BASE);
     reg_write64(UCIE0_REG_BASE + UCIE_MAINBAND_MODE, UCIE_BAND_MODE_TL);
+    reset_datapath(UCIE0_REG_BASE);
     printf("Set up UCIe 0 for chip 1\n");
     program_router(0, 2, 0); // Chip 1 UCIe0 -> Chip 2 UCIe1
     rw_mem(OFFCHIP_OFFSET * 2);
     printf("Chip 1 DONE\n");
   } else {
     setup_ucie(UCIE1_REG_BASE);
     reg_write64(UCIE1_REG_BASE + UCIE_MAINBAND_MODE, UCIE_BAND_MODE_TL);
+    reset_datapath(UCIE1_REG_BASE);
     printf("Set up UCIe 1 for chip 2\n");
     program_router(0, 1, 1); // Chip 2 UCIe1 -> Chip 1 UCIe0
     rw_mem(OFFCHIP_OFFSET * 1);

software/tacit-always.c

@@ -36,7 +36,8 @@ static void branch_workload(void)
 
 int main(void)
 {
-  for (unsigned tile = 0; tile < 3; tile++) {
+  // One encoder per tile: the Shuttle tile and Rocket.
+  for (unsigned tile = 0; tile < 2; tile++) {
     tacit_select_always(tile);
   }
   branch_workload();

software/ucie-loopback.c

@@ -54,9 +54,11 @@ int main(void) {
   printf("Setting up UCIe0\n");
   setup_ucie(UCIE0_REG_BASE);
   reg_write64(UCIE0_REG_BASE + UCIE_MAINBAND_MODE, UCIE_BAND_MODE_TL);
+  reset_datapath(UCIE0_REG_BASE);
   printf("Setting up UCIe1\n");
   setup_ucie(UCIE1_REG_BASE);
   reg_write64(UCIE1_REG_BASE + UCIE_MAINBAND_MODE, UCIE_BAND_MODE_TL);
+  reset_datapath(UCIE1_REG_BASE);
 
   printf("Testing UCIe at port 0\n");
   program_router(0, 1, 0);

software/ucie-vec-memcpy.c

@@ -1,7 +1,7 @@
 // two-chip UCIe RVV memcpy test
 //
-// hart 0/1 are the Shuttle/OPU cores 
-// hart 2 is the Rocket tile with Saturn DMA
+// hart 0 is the Shuttle/OPU core
+// hart 1 is the Rocket tile with Saturn DMA
 // BENCH_HART_ID picks which hart runs this test
 
 #include <stdint.h>
@@ -24,10 +24,10 @@
 #define COPY_BYTES 256
 #endif
 
-// Which hart runs the test. Hart 2 is the Saturn-DMA-only rocket tile added
+// Which hart runs the test. Hart 1 is the Saturn-DMA-only rocket tile added
 // by IrisConfig's "Saturn DMA" line. Tunable: -DBENCH_HART_ID=<n>.
 #ifndef BENCH_HART_ID
-#define BENCH_HART_ID 2
+#define BENCH_HART_ID 1
 #endif
 
 // Aligned to the 32-byte beat so the natural-alignment path is exercised.
@@ -57,6 +57,7 @@ void __main(void)
     // ============================================================
     setup_ucie(UCIE0_REG_BASE);
     reg_write64(UCIE0_REG_BASE + UCIE_MAINBAND_MODE, UCIE_BAND_MODE_TL);
+    reset_datapath(UCIE0_REG_BASE);
     program_router(0, 2, 0);
 
     uint64_t peer_chip_id = 2;
@@ -90,6 +91,7 @@ void __main(void)
     // ============================================================
     setup_ucie(UCIE1_REG_BASE);
     reg_write64(UCIE1_REG_BASE + UCIE_MAINBAND_MODE, UCIE_BAND_MODE_TL);
+    reset_datapath(UCIE1_REG_BASE);
     program_router(0, 1, 1);
 
     *done_flag = 0;